xref: /openbmc/u-boot/include/configs/stm32mp1.h (revision cf4c3448)
1 /*
2  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
3  *
4  * Configuration settings for the STM32MP15x CPU
5  *
6  * SPDX-License-Identifier:	GPL-2.0+	BSD-3-Clause
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 #include <linux/sizes.h>
12 #include <asm/arch/stm32.h>
13 
14 #define CONFIG_PREBOOT
15 
16 /*
17  * Number of clock ticks in 1 sec
18  */
19 #define CONFIG_SYS_HZ				1000
20 #define CONFIG_SYS_ARCH_TIMER
21 #define CONFIG_SYS_HZ_CLOCK			64000000
22 
23 /*
24  * malloc() pool size
25  */
26 #define CONFIG_SYS_MALLOC_LEN			SZ_32M
27 
28 /*
29  * Configuration of the external SRAM memory used by U-Boot
30  */
31 #define CONFIG_SYS_SDRAM_BASE			STM32_DDR_BASE
32 #define CONFIG_SYS_INIT_SP_ADDR			CONFIG_SYS_TEXT_BASE
33 
34 #define CONFIG_NR_DRAM_BANKS	1
35 
36 /*
37  * Console I/O buffer size
38  */
39 #define CONFIG_SYS_CBSIZE			SZ_1K
40 
41 /*
42  * Needed by "loadb"
43  */
44 #define CONFIG_SYS_LOAD_ADDR			STM32_DDR_BASE
45 
46 /*
47  * Env parameters
48  */
49 #define CONFIG_ENV_SIZE				SZ_4K
50 
51 /* ATAGs */
52 #define CONFIG_CMDLINE_TAG
53 #define CONFIG_SETUP_MEMORY_TAGS
54 #define CONFIG_INITRD_TAG
55 
56 /* SPL support */
57 #ifdef CONFIG_SPL
58 /* BOOTROM load address */
59 #define CONFIG_SPL_TEXT_BASE		0x2FFC2500
60 /* SPL use DDR */
61 #define CONFIG_SPL_BSS_START_ADDR	0xC0200000
62 #define CONFIG_SPL_BSS_MAX_SIZE		0x00100000
63 #define CONFIG_SYS_SPL_MALLOC_START	0xC0300000
64 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00100000
65 
66 /* limit SYSRAM usage to first 128 KB */
67 #define CONFIG_SPL_MAX_SIZE		0x00020000
68 #define CONFIG_SPL_STACK		(STM32_SYSRAM_BASE + \
69 					 STM32_SYSRAM_SIZE)
70 #endif /* #ifdef CONFIG_SPL */
71 
72 /*MMC SD*/
73 #define CONFIG_SYS_MMC_MAX_DEVICE	3
74 
75 #if !defined(CONFIG_SPL) || !defined(CONFIG_SPL_BUILD)
76 
77 #define BOOT_TARGET_DEVICES(func) \
78 	func(MMC, mmc, 1) \
79 	func(MMC, mmc, 0) \
80 	func(MMC, mmc, 2)
81 
82 #include <config_distro_bootcmd.h>
83 
84 #define CONFIG_EXTRA_ENV_SETTINGS \
85 	"scriptaddr=0xC0000000\0" \
86 	"pxefile_addr_r=0xC0000000\0" \
87 	"kernel_addr_r=0xC1000000\0" \
88 	"fdt_addr_r=0xC4000000\0" \
89 	"ramdisk_addr_r=0xC4100000\0" \
90 	"fdt_high=0xffffffff\0" \
91 	"initrd_high=0xffffffff\0" \
92 	BOOTENV
93 
94 #endif /* ifndef CONFIG_SPL_BUILD */
95 
96 #endif /* __CONFIG_H */
97