1 /* 2 * (C) Copyright 2016 3 * Vikas Manocha, <vikas.manocha@st.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #define CONFIG_SYS_FLASH_BASE 0x08000000 12 #define CONFIG_SYS_INIT_SP_ADDR 0x20050000 13 14 #ifdef CONFIG_SUPPORT_SPL 15 #define CONFIG_SYS_TEXT_BASE 0x08008000 16 #define CONFIG_SYS_LOAD_ADDR 0x08008000 17 #else 18 #define CONFIG_SYS_TEXT_BASE CONFIG_SYS_FLASH_BASE 19 #define CONFIG_SYS_LOAD_ADDR 0xC0400000 20 #define CONFIG_LOADADDR 0xC0400000 21 #endif 22 23 /* 24 * Configuration of the external SDRAM memory 25 */ 26 #define CONFIG_NR_DRAM_BANKS 1 27 28 #define CONFIG_SYS_MAX_FLASH_SECT 8 29 #define CONFIG_SYS_MAX_FLASH_BANKS 1 30 31 #define CONFIG_ENV_IS_NOWHERE 32 #define CONFIG_ENV_SIZE (8 << 10) 33 34 #define CONFIG_STM32_FLASH 35 #define CONFIG_STM32X7_SERIAL 36 37 #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) 38 #define CONFIG_DW_ALTDESCRIPTOR 39 #define CONFIG_MII 40 #define CONFIG_PHY_SMSC 41 42 #define CONFIG_STM32_HSE_HZ 25000000 43 #define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */ 44 #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ 45 46 #define CONFIG_CMDLINE_TAG 47 #define CONFIG_SETUP_MEMORY_TAGS 48 #define CONFIG_INITRD_TAG 49 #define CONFIG_REVISION_TAG 50 51 #define CONFIG_SYS_CBSIZE 1024 52 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 53 + sizeof(CONFIG_SYS_PROMPT) + 16) 54 55 #define CONFIG_SYS_MAXARGS 16 56 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 57 58 #define CONFIG_BOOTARGS \ 59 "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" 60 #define CONFIG_BOOTCOMMAND \ 61 "run bootcmd_romfs" 62 63 #define CONFIG_EXTRA_ENV_SETTINGS \ 64 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \ 65 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \ 66 "bootm 0x08044000 - 0x08042000\0" 67 68 69 /* 70 * Command line configuration. 71 */ 72 #define CONFIG_SYS_LONGHELP 73 #define CONFIG_AUTO_COMPLETE 74 #define CONFIG_CMDLINE_EDITING 75 #define CONFIG_CMD_CACHE 76 #define CONFIG_BOARD_LATE_INIT 77 #define CONFIG_DISPLAY_BOARDINFO 78 79 /* For SPL */ 80 #ifdef CONFIG_SUPPORT_SPL 81 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 82 #define CONFIG_SPL_FRAMEWORK 83 #define CONFIG_SPL_BOARD_INIT 84 #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE 85 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 86 #define CONFIG_SYS_SPL_LEN 0x00008000 87 #define CONFIG_SYS_UBOOT_START 0x080083FD 88 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ 89 CONFIG_SYS_SPL_LEN) 90 91 /* DT blob (fdt) address */ 92 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 93 0x1C0000) 94 #endif 95 /* For SPL ends */ 96 97 #endif /* __CONFIG_H */ 98