1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2009 4 * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 /* 11 * High Level Configuration Options 12 * (easy to change) 13 */ 14 #if defined(CONFIG_SPEAR300) 15 #define CONFIG_SPEAR3XX 16 #elif defined(CONFIG_SPEAR310) 17 #define CONFIG_SPEAR3XX 18 #elif defined(CONFIG_SPEAR320) 19 #define CONFIG_SPEAR3XX 20 #endif 21 22 #if defined(CONFIG_USBTTY) 23 #define CONFIG_SPEAR_USBTTY 24 #endif 25 26 #include <configs/spear-common.h> 27 28 /* Ethernet driver configuration */ 29 #define CONFIG_DW_ALTDESCRIPTOR 30 31 #if defined(CONFIG_SPEAR310) 32 #define CONFIG_MACB 33 #define CONFIG_MACB0_PHY 0x01 34 #define CONFIG_MACB1_PHY 0x03 35 #define CONFIG_MACB2_PHY 0x05 36 #define CONFIG_MACB3_PHY 0x07 37 38 #elif defined(CONFIG_SPEAR320) 39 #define CONFIG_MACB 40 #define CONFIG_MACB0_PHY 0x01 41 42 #endif 43 44 /* Serial Configuration (PL011) */ 45 #define CONFIG_SYS_SERIAL0 0xD0000000 46 47 #if defined(CONFIG_SPEAR300) 48 #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0} 49 50 #elif defined(CONFIG_SPEAR310) 51 52 #if (CONFIG_CONS_INDEX) 53 #undef CONFIG_PL011_CLOCK 54 #define CONFIG_PL011_CLOCK (83 * 1000 * 1000) 55 #endif 56 57 #define CONFIG_SYS_SERIAL1 0xB2000000 58 #define CONFIG_SYS_SERIAL2 0xB2080000 59 #define CONFIG_SYS_SERIAL3 0xB2100000 60 #define CONFIG_SYS_SERIAL4 0xB2180000 61 #define CONFIG_SYS_SERIAL5 0xB2200000 62 #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ 63 (void *)CONFIG_SYS_SERIAL1, \ 64 (void *)CONFIG_SYS_SERIAL2, \ 65 (void *)CONFIG_SYS_SERIAL3, \ 66 (void *)CONFIG_SYS_SERIAL4, \ 67 (void *)CONFIG_SYS_SERIAL5 } 68 #elif defined(CONFIG_SPEAR320) 69 70 #if (CONFIG_CONS_INDEX) 71 #undef CONFIG_PL011_CLOCK 72 #define CONFIG_PL011_CLOCK (83 * 1000 * 1000) 73 #endif 74 75 #define CONFIG_SYS_SERIAL1 0xA3000000 76 #define CONFIG_SYS_SERIAL2 0xA4000000 77 #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ 78 (void *)CONFIG_SYS_SERIAL1, \ 79 (void *)CONFIG_SYS_SERIAL2 } 80 #endif 81 82 #if defined(CONFIG_SPEAR_EMI) 83 #if defined(CONFIG_SPEAR310) 84 #define CONFIG_SYS_FLASH_BASE 0x50000000 85 #define CONFIG_SYS_CS1_FLASH_BASE 0x60000000 86 #define CONFIG_SYS_CS2_FLASH_BASE 0x70000000 87 #define CONFIG_SYS_CS3_FLASH_BASE 0x80000000 88 #define CONFIG_SYS_CS4_FLASH_BASE 0x90000000 89 #define CONFIG_SYS_CS5_FLASH_BASE 0xA0000000 90 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ 91 CONFIG_SYS_CS1_FLASH_BASE, \ 92 CONFIG_SYS_CS2_FLASH_BASE, \ 93 CONFIG_SYS_CS3_FLASH_BASE, \ 94 CONFIG_SYS_CS4_FLASH_BASE, \ 95 CONFIG_SYS_CS5_FLASH_BASE } 96 #define CONFIG_SYS_MAX_FLASH_BANKS 6 97 98 #elif defined(CONFIG_SPEAR320) 99 #define CONFIG_SYS_FLASH_BASE 0x44000000 100 #define CONFIG_SYS_CS1_FLASH_BASE 0x45000000 101 #define CONFIG_SYS_CS2_FLASH_BASE 0x46000000 102 #define CONFIG_SYS_CS3_FLASH_BASE 0x47000000 103 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ 104 CONFIG_SYS_CS1_FLASH_BASE, \ 105 CONFIG_SYS_CS2_FLASH_BASE, \ 106 CONFIG_SYS_CS3_FLASH_BASE } 107 #define CONFIG_SYS_MAX_FLASH_BANKS 4 108 109 #endif 110 111 #define CONFIG_SYS_MAX_FLASH_SECT (127 + 8) 112 #define CONFIG_SYS_FLASH_QUIET_TEST 113 114 #endif 115 116 /* NAND flash configuration */ 117 #define CONFIG_SYS_FSMC_NAND_SP 118 #define CONFIG_SYS_FSMC_NAND_8BIT 119 120 #if defined(CONFIG_SPEAR300) 121 #define CONFIG_SYS_NAND_BASE 0x80000000 122 123 #elif defined(CONFIG_SPEAR310) 124 #define CONFIG_SYS_NAND_BASE 0x40000000 125 126 #elif defined(CONFIG_SPEAR320) 127 #define CONFIG_SYS_NAND_BASE 0x50000000 128 129 #endif 130 131 /* Environment Settings */ 132 #if defined(CONFIG_SPEAR300) 133 #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY 134 135 #elif defined(CONFIG_SPEAR310) || defined(CONFIG_SPEAR320) 136 #define CONFIG_EXTRA_ENV_UNLOCK "unlock=yes\0" 137 #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY \ 138 CONFIG_EXTRA_ENV_UNLOCK 139 #endif 140 141 #endif /* __CONFIG_H */ 142