1 /* 2 * (C) Copyright 2009 3 * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _SPEAR_COMMON_H 9 #define _SPEAR_COMMON_H 10 /* 11 * Common configurations used for both spear3xx as well as spear6xx 12 */ 13 14 /* U-Boot Load Address */ 15 #define CONFIG_SYS_TEXT_BASE 0x00700000 16 17 /* Ethernet driver configuration */ 18 #define CONFIG_MII 19 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 20 #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ 21 22 /* USBD driver configuration */ 23 #if defined(CONFIG_SPEAR_USBTTY) 24 #define CONFIG_DW_UDC 25 #define CONFIG_USB_DEVICE 26 #define CONFIG_USBD_HS 27 #define CONFIG_USB_TTY 28 29 #define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" 30 #define CONFIG_USBD_MANUFACTURER "ST Microelectronics" 31 32 #endif 33 34 #define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0" 35 36 /* I2C driver configuration */ 37 #define CONFIG_SYS_I2C 38 #if defined(CONFIG_SPEAR600) 39 #define CONFIG_SYS_I2C_BASE 0xD0200000 40 #elif defined(CONFIG_SPEAR300) 41 #define CONFIG_SYS_I2C_BASE 0xD0180000 42 #elif defined(CONFIG_SPEAR310) 43 #define CONFIG_SYS_I2C_BASE 0xD0180000 44 #elif defined(CONFIG_SPEAR320) 45 #define CONFIG_SYS_I2C_BASE 0xD0180000 46 #endif 47 #define CONFIG_SYS_I2C_SPEED 400000 48 #define CONFIG_SYS_I2C_SLAVE 0x02 49 50 #define CONFIG_I2C_CHIPADDRESS 0x50 51 52 /* Timer, HZ specific defines */ 53 54 /* Flash configuration */ 55 #if defined(CONFIG_FLASH_PNOR) 56 #define CONFIG_SPEAR_EMI 57 #else 58 #define CONFIG_ST_SMI 59 #endif 60 61 #if defined(CONFIG_ST_SMI) 62 63 #define CONFIG_SYS_MAX_FLASH_BANKS 2 64 #define CONFIG_SYS_FLASH_BASE 0xF8000000 65 #define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000 66 #define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000 67 #define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \ 68 CONFIG_SYS_CS1_FLASH_BASE} 69 #define CONFIG_SYS_MAX_FLASH_SECT 128 70 71 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ) 72 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ) 73 74 #endif 75 76 /* 77 * Serial Configuration (PL011) 78 * CONFIG_PL01x_PORTS is defined in specific files 79 */ 80 #define CONFIG_PL011_SERIAL 81 #define CONFIG_PL011_CLOCK (48 * 1000 * 1000) 82 #define CONFIG_CONS_INDEX 0 83 #define CONFIG_BAUDRATE 115200 84 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \ 85 57600, 115200 } 86 87 #define CONFIG_SYS_LOADS_BAUD_CHANGE 88 89 /* NAND FLASH Configuration */ 90 #define CONFIG_SYS_NAND_SELF_INIT 91 #define CONFIG_MTD_DEVICE 92 #define CONFIG_MTD_PARTITIONS 93 #define CONFIG_NAND_FSMC 94 #define CONFIG_SYS_MAX_NAND_DEVICE 1 95 #define CONFIG_SYS_NAND_ONFI_DETECTION 96 97 /* 98 * Command support defines 99 */ 100 #define CONFIG_CMD_NAND 101 #define CONFIG_CMD_ENV 102 #define CONFIG_CMD_SAVES 103 104 /* 105 * Default Environment Varible definitions 106 */ 107 #if defined(CONFIG_SPEAR_USBTTY) 108 #define CONFIG_BOOTDELAY -1 109 #else 110 #define CONFIG_BOOTDELAY 1 111 #endif 112 113 #define CONFIG_ENV_OVERWRITE 114 115 /* 116 * U-Boot Environment placing definitions. 117 */ 118 #if defined(CONFIG_ENV_IS_IN_FLASH) 119 #ifdef CONFIG_ST_SMI 120 /* 121 * Environment is in serial NOR flash 122 */ 123 #define CONFIG_SYS_MONITOR_LEN 0x00040000 124 #define CONFIG_ENV_SECT_SIZE 0x00010000 125 #define CONFIG_FSMTDBLK "/dev/mtdblock3 " 126 127 #define CONFIG_BOOTCOMMAND "bootm 0xf8050000" 128 129 #elif defined(CONFIG_SPEAR_EMI) 130 /* 131 * Environment is in parallel NOR flash 132 */ 133 #define CONFIG_SYS_MONITOR_LEN 0x00060000 134 #define CONFIG_ENV_SECT_SIZE 0x00020000 135 #define CONFIG_FSMTDBLK "/dev/mtdblock3 " 136 137 #define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \ 138 "0x4C0000; bootm 0x1600000" 139 #endif 140 141 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ 142 CONFIG_SYS_MONITOR_LEN) 143 #elif defined(CONFIG_ENV_IS_IN_NAND) 144 /* 145 * Environment is in NAND 146 */ 147 148 #define CONFIG_ENV_OFFSET 0x60000 149 #define CONFIG_ENV_RANGE 0x10000 150 #define CONFIG_FSMTDBLK "/dev/mtdblock7 " 151 152 #define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ 153 "0x80000 0x4C0000; " \ 154 "bootm 0x1600000" 155 #endif 156 157 #define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \ 158 "mem=128M " \ 159 "root="CONFIG_FSMTDBLK \ 160 "rootfstype=jffs2" 161 162 #define CONFIG_NFSBOOTCOMMAND \ 163 "bootp; " \ 164 "setenv bootargs root=/dev/nfs rw " \ 165 "nfsroot=$(serverip):$(rootpath) " \ 166 "ip=$(ipaddr):$(serverip):$(gatewayip):" \ 167 "$(netmask):$(hostname):$(netdev):off " \ 168 "console=ttyAMA0,115200 $(othbootargs);" \ 169 "bootm; " 170 171 #define CONFIG_RAMBOOTCOMMAND \ 172 "setenv bootargs root=/dev/ram rw " \ 173 "console=ttyAMA0,115200 $(othbootargs);" \ 174 CONFIG_BOOTCOMMAND 175 176 #define CONFIG_ENV_SIZE 0x02000 177 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 178 179 /* Miscellaneous configurable options */ 180 #define CONFIG_ARCH_CPU_INIT 181 #define CONFIG_BOARD_EARLY_INIT_F 182 #define CONFIG_DISPLAY_CPUINFO 183 #define CONFIG_BOOT_PARAMS_ADDR 0x00000100 184 #define CONFIG_CMDLINE_TAG 185 #define CONFIG_SETUP_MEMORY_TAGS 186 #define CONFIG_MISC_INIT_R 187 #define CONFIG_ZERO_BOOTDELAY_CHECK 188 189 #define CONFIG_SYS_MEMTEST_START 0x00800000 190 #define CONFIG_SYS_MEMTEST_END 0x04000000 191 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 192 #define CONFIG_IDENT_STRING "-SPEAr" 193 #define CONFIG_SYS_LONGHELP 194 #define CONFIG_CMDLINE_EDITING 195 #define CONFIG_SYS_CBSIZE 256 196 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 197 sizeof(CONFIG_SYS_PROMPT) + 16) 198 #define CONFIG_SYS_MAXARGS 16 199 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 200 #define CONFIG_SYS_LOAD_ADDR 0x00800000 201 #define CONFIG_SYS_CONSOLE_INFO_QUIET 202 203 #define CONFIG_SYS_FLASH_EMPTY_INFO 204 205 /* Physical Memory Map */ 206 #define CONFIG_NR_DRAM_BANKS 1 207 #define PHYS_SDRAM_1 0x00000000 208 #define PHYS_SDRAM_1_MAXSIZE 0x40000000 209 210 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 211 #define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000 212 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 213 214 #define CONFIG_SYS_INIT_SP_OFFSET \ 215 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 216 217 #define CONFIG_SYS_INIT_SP_ADDR \ 218 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 219 220 #endif 221