1 /*
2  * (C) Copyright 2009
3  * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _SPEAR_COMMON_H
9 #define _SPEAR_COMMON_H
10 /*
11  * Common configurations used for both spear3xx as well as spear6xx
12  */
13 
14 /* U-Boot Load Address */
15 
16 /* Ethernet driver configuration */
17 #define CONFIG_MII
18 #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
19 
20 /* USBD driver configuration */
21 #if defined(CONFIG_SPEAR_USBTTY)
22 #define CONFIG_DW_UDC
23 #define CONFIG_USB_DEVICE
24 #define CONFIG_USBD_HS
25 #define CONFIG_USB_TTY
26 
27 #define CONFIG_USBD_PRODUCT_NAME		"SPEAr SoC"
28 #define CONFIG_USBD_MANUFACTURER		"ST Microelectronics"
29 
30 #endif
31 
32 #define CONFIG_EXTRA_ENV_USBTTY			"usbtty=cdc_acm\0"
33 
34 /* I2C driver configuration */
35 #define CONFIG_SYS_I2C
36 #if defined(CONFIG_SPEAR600)
37 #define CONFIG_SYS_I2C_BASE			0xD0200000
38 #elif defined(CONFIG_SPEAR300)
39 #define CONFIG_SYS_I2C_BASE			0xD0180000
40 #elif defined(CONFIG_SPEAR310)
41 #define CONFIG_SYS_I2C_BASE			0xD0180000
42 #elif defined(CONFIG_SPEAR320)
43 #define CONFIG_SYS_I2C_BASE			0xD0180000
44 #endif
45 #define CONFIG_SYS_I2C_SPEED			400000
46 #define CONFIG_SYS_I2C_SLAVE			0x02
47 
48 #define CONFIG_I2C_CHIPADDRESS			0x50
49 
50 /* Timer, HZ specific defines */
51 
52 /* Flash configuration */
53 #if defined(CONFIG_FLASH_PNOR)
54 #define CONFIG_SPEAR_EMI
55 #else
56 #define CONFIG_ST_SMI
57 #endif
58 
59 #if defined(CONFIG_ST_SMI)
60 
61 #define CONFIG_SYS_MAX_FLASH_BANKS		2
62 #define CONFIG_SYS_FLASH_BASE			0xF8000000
63 #define CONFIG_SYS_CS1_FLASH_BASE		0xF9000000
64 #define CONFIG_SYS_FLASH_BANK_SIZE		0x01000000
65 #define CONFIG_SYS_FLASH_ADDR_BASE		{CONFIG_SYS_FLASH_BASE, \
66 						CONFIG_SYS_CS1_FLASH_BASE}
67 #define CONFIG_SYS_MAX_FLASH_SECT		128
68 
69 #define CONFIG_SYS_FLASH_ERASE_TOUT		(3 * CONFIG_SYS_HZ)
70 #define CONFIG_SYS_FLASH_WRITE_TOUT		(3 * CONFIG_SYS_HZ)
71 
72 #endif
73 
74 /*
75  * Serial Configuration (PL011)
76  * CONFIG_PL01x_PORTS is defined in specific files
77  */
78 #define CONFIG_PL011_CLOCK			(48 * 1000 * 1000)
79 #define CONFIG_CONS_INDEX			0
80 #define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, \
81 						57600, 115200 }
82 
83 #define CONFIG_SYS_LOADS_BAUD_CHANGE
84 
85 /* NAND FLASH Configuration */
86 #define CONFIG_SYS_NAND_SELF_INIT
87 #define CONFIG_MTD_DEVICE
88 #define CONFIG_MTD_PARTITIONS
89 #define CONFIG_NAND_FSMC
90 #define CONFIG_SYS_MAX_NAND_DEVICE		1
91 #define CONFIG_SYS_NAND_ONFI_DETECTION
92 
93 /*
94  * Default Environment Varible definitions
95  */
96 #define CONFIG_ENV_OVERWRITE
97 
98 /*
99  * U-Boot Environment placing definitions.
100  */
101 #if defined(CONFIG_ENV_IS_IN_FLASH)
102 #ifdef CONFIG_ST_SMI
103 /*
104  * Environment is in serial NOR flash
105  */
106 #define CONFIG_SYS_MONITOR_LEN			0x00040000
107 #define CONFIG_ENV_SECT_SIZE			0x00010000
108 #define CONFIG_FSMTDBLK				"/dev/mtdblock3 "
109 
110 #define CONFIG_BOOTCOMMAND			"bootm 0xf8050000"
111 
112 #elif defined(CONFIG_SPEAR_EMI)
113 /*
114  * Environment is in parallel NOR flash
115  */
116 #define CONFIG_SYS_MONITOR_LEN			0x00060000
117 #define CONFIG_ENV_SECT_SIZE			0x00020000
118 #define CONFIG_FSMTDBLK				"/dev/mtdblock3 "
119 
120 #define CONFIG_BOOTCOMMAND			"cp.b 0x50080000 0x1600000 " \
121 						"0x4C0000; bootm 0x1600000"
122 #endif
123 
124 #define CONFIG_ENV_ADDR				(CONFIG_SYS_FLASH_BASE + \
125 						CONFIG_SYS_MONITOR_LEN)
126 #elif defined(CONFIG_ENV_IS_IN_NAND)
127 /*
128  * Environment is in NAND
129  */
130 
131 #define CONFIG_ENV_OFFSET			0x60000
132 #define CONFIG_ENV_RANGE			0x10000
133 #define CONFIG_FSMTDBLK				"/dev/mtdblock7 "
134 
135 #define CONFIG_BOOTCOMMAND			"nand read.jffs2 0x1600000 " \
136 						"0x80000 0x4C0000; " \
137 						"bootm 0x1600000"
138 #endif
139 
140 #define CONFIG_NFSBOOTCOMMAND						\
141 	"bootp; "							\
142 	"setenv bootargs root=/dev/nfs rw "				\
143 	"nfsroot=$(serverip):$(rootpath) "				\
144 	"ip=$(ipaddr):$(serverip):$(gatewayip):"			\
145 			"$(netmask):$(hostname):$(netdev):off "		\
146 			"console=ttyAMA0,115200 $(othbootargs);"	\
147 	"bootm; "
148 
149 #define CONFIG_RAMBOOTCOMMAND						\
150 	"setenv bootargs root=/dev/ram rw "				\
151 		"console=ttyAMA0,115200 $(othbootargs);"		\
152 	CONFIG_BOOTCOMMAND
153 
154 #define CONFIG_ENV_SIZE				0x02000
155 #define CONFIG_SYS_MONITOR_BASE			CONFIG_SYS_TEXT_BASE
156 
157 /* Miscellaneous configurable options */
158 #define CONFIG_ARCH_CPU_INIT
159 #define CONFIG_BOOT_PARAMS_ADDR			0x00000100
160 #define CONFIG_CMDLINE_TAG
161 #define CONFIG_SETUP_MEMORY_TAGS
162 #define CONFIG_MISC_INIT_R
163 
164 #define CONFIG_SYS_MEMTEST_START		0x00800000
165 #define CONFIG_SYS_MEMTEST_END			0x04000000
166 #define CONFIG_SYS_MALLOC_LEN			(1024*1024)
167 #define CONFIG_SYS_LOAD_ADDR			0x00800000
168 
169 #define CONFIG_SYS_FLASH_EMPTY_INFO
170 
171 /* Physical Memory Map */
172 #define CONFIG_NR_DRAM_BANKS			1
173 #define PHYS_SDRAM_1				0x00000000
174 #define PHYS_SDRAM_1_MAXSIZE			0x40000000
175 
176 #define CONFIG_SYS_SDRAM_BASE			PHYS_SDRAM_1
177 #define CONFIG_SYS_INIT_RAM_ADDR		0xD2800000
178 #define CONFIG_SYS_INIT_RAM_SIZE		0x2000
179 
180 #define CONFIG_SYS_INIT_SP_OFFSET		\
181 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
182 
183 #define CONFIG_SYS_INIT_SP_ADDR			\
184 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
185 
186 #endif
187