1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2009 4 * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> 5 */ 6 7 #ifndef _SPEAR_COMMON_H 8 #define _SPEAR_COMMON_H 9 /* 10 * Common configurations used for both spear3xx as well as spear6xx 11 */ 12 13 /* U-Boot Load Address */ 14 15 /* Ethernet driver configuration */ 16 #define CONFIG_MII 17 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 18 19 /* USBD driver configuration */ 20 #if defined(CONFIG_SPEAR_USBTTY) 21 #define CONFIG_DW_UDC 22 #define CONFIG_USB_DEVICE 23 #define CONFIG_USBD_HS 24 #define CONFIG_USB_TTY 25 26 #define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" 27 #define CONFIG_USBD_MANUFACTURER "ST Microelectronics" 28 29 #endif 30 31 #define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0" 32 33 /* I2C driver configuration */ 34 #define CONFIG_SYS_I2C 35 #if defined(CONFIG_SPEAR600) 36 #define CONFIG_SYS_I2C_BASE 0xD0200000 37 #elif defined(CONFIG_SPEAR300) 38 #define CONFIG_SYS_I2C_BASE 0xD0180000 39 #elif defined(CONFIG_SPEAR310) 40 #define CONFIG_SYS_I2C_BASE 0xD0180000 41 #elif defined(CONFIG_SPEAR320) 42 #define CONFIG_SYS_I2C_BASE 0xD0180000 43 #endif 44 #define CONFIG_SYS_I2C_SPEED 400000 45 #define CONFIG_SYS_I2C_SLAVE 0x02 46 47 #define CONFIG_I2C_CHIPADDRESS 0x50 48 49 /* Timer, HZ specific defines */ 50 51 /* Flash configuration */ 52 #if defined(CONFIG_FLASH_PNOR) 53 #define CONFIG_SPEAR_EMI 54 #else 55 #define CONFIG_ST_SMI 56 #endif 57 58 #if defined(CONFIG_ST_SMI) 59 60 #define CONFIG_SYS_MAX_FLASH_BANKS 2 61 #define CONFIG_SYS_FLASH_BASE 0xF8000000 62 #define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000 63 #define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000 64 #define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \ 65 CONFIG_SYS_CS1_FLASH_BASE} 66 #define CONFIG_SYS_MAX_FLASH_SECT 128 67 68 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ) 69 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ) 70 71 #endif 72 73 /* 74 * Serial Configuration (PL011) 75 * CONFIG_PL01x_PORTS is defined in specific files 76 */ 77 #define CONFIG_PL011_CLOCK (48 * 1000 * 1000) 78 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \ 79 57600, 115200 } 80 81 #define CONFIG_SYS_LOADS_BAUD_CHANGE 82 83 /* NAND FLASH Configuration */ 84 #define CONFIG_SYS_NAND_SELF_INIT 85 #define CONFIG_MTD_DEVICE 86 #define CONFIG_MTD_PARTITIONS 87 #define CONFIG_NAND_FSMC 88 #define CONFIG_SYS_MAX_NAND_DEVICE 1 89 #define CONFIG_SYS_NAND_ONFI_DETECTION 90 91 /* 92 * Default Environment Varible definitions 93 */ 94 #define CONFIG_ENV_OVERWRITE 95 96 /* 97 * U-Boot Environment placing definitions. 98 */ 99 #if defined(CONFIG_ENV_IS_IN_FLASH) 100 #ifdef CONFIG_ST_SMI 101 /* 102 * Environment is in serial NOR flash 103 */ 104 #define CONFIG_SYS_MONITOR_LEN 0x00040000 105 #define CONFIG_ENV_SECT_SIZE 0x00010000 106 #define CONFIG_FSMTDBLK "/dev/mtdblock3 " 107 108 #define CONFIG_BOOTCOMMAND "bootm 0xf8050000" 109 110 #elif defined(CONFIG_SPEAR_EMI) 111 /* 112 * Environment is in parallel NOR flash 113 */ 114 #define CONFIG_SYS_MONITOR_LEN 0x00060000 115 #define CONFIG_ENV_SECT_SIZE 0x00020000 116 #define CONFIG_FSMTDBLK "/dev/mtdblock3 " 117 118 #define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \ 119 "0x4C0000; bootm 0x1600000" 120 #endif 121 122 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ 123 CONFIG_SYS_MONITOR_LEN) 124 #elif defined(CONFIG_ENV_IS_IN_NAND) 125 /* 126 * Environment is in NAND 127 */ 128 129 #define CONFIG_ENV_OFFSET 0x60000 130 #define CONFIG_ENV_RANGE 0x10000 131 #define CONFIG_FSMTDBLK "/dev/mtdblock7 " 132 133 #define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ 134 "0x80000 0x4C0000; " \ 135 "bootm 0x1600000" 136 #endif 137 138 #define CONFIG_NFSBOOTCOMMAND \ 139 "bootp; " \ 140 "setenv bootargs root=/dev/nfs rw " \ 141 "nfsroot=$(serverip):$(rootpath) " \ 142 "ip=$(ipaddr):$(serverip):$(gatewayip):" \ 143 "$(netmask):$(hostname):$(netdev):off " \ 144 "console=ttyAMA0,115200 $(othbootargs);" \ 145 "bootm; " 146 147 #define CONFIG_RAMBOOTCOMMAND \ 148 "setenv bootargs root=/dev/ram rw " \ 149 "console=ttyAMA0,115200 $(othbootargs);" \ 150 CONFIG_BOOTCOMMAND 151 152 #define CONFIG_ENV_SIZE 0x02000 153 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 154 155 /* Miscellaneous configurable options */ 156 #define CONFIG_ARCH_CPU_INIT 157 #define CONFIG_BOOT_PARAMS_ADDR 0x00000100 158 #define CONFIG_CMDLINE_TAG 159 #define CONFIG_SETUP_MEMORY_TAGS 160 #define CONFIG_MISC_INIT_R 161 162 #define CONFIG_SYS_MEMTEST_START 0x00800000 163 #define CONFIG_SYS_MEMTEST_END 0x04000000 164 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 165 #define CONFIG_SYS_LOAD_ADDR 0x00800000 166 167 #define CONFIG_SYS_FLASH_EMPTY_INFO 168 169 /* Physical Memory Map */ 170 #define CONFIG_NR_DRAM_BANKS 1 171 #define PHYS_SDRAM_1 0x00000000 172 #define PHYS_SDRAM_1_MAXSIZE 0x40000000 173 174 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 175 #define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000 176 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 177 178 #define CONFIG_SYS_INIT_SP_OFFSET \ 179 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 180 181 #define CONFIG_SYS_INIT_SP_ADDR \ 182 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 183 184 #endif 185