1 /*
2  * Copyright (C) 2014 Marek Vasut <marex@denx.de>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 #ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
7 #define __CONFIG_SOCFPGA_CYCLONE5_H__
8 
9 #include <asm/arch/base_addr_ac5.h>
10 
11 /* U-Boot Commands */
12 #define CONFIG_SYS_NO_FLASH
13 #define CONFIG_DOS_PARTITION
14 #define CONFIG_FAT_WRITE
15 #define CONFIG_HW_WATCHDOG
16 
17 #define CONFIG_CMD_ASKENV
18 #define CONFIG_CMD_BOOTZ
19 #define CONFIG_CMD_CACHE
20 #define CONFIG_CMD_DFU
21 #define CONFIG_CMD_DHCP
22 #define CONFIG_CMD_EXT4
23 #define CONFIG_CMD_EXT4_WRITE
24 #define CONFIG_CMD_FAT
25 #define CONFIG_CMD_FS_GENERIC
26 #define CONFIG_CMD_GREPENV
27 #define CONFIG_CMD_MII
28 #define CONFIG_CMD_MMC
29 #define CONFIG_CMD_PING
30 #define CONFIG_CMD_USB
31 #define CONFIG_CMD_USB_MASS_STORAGE
32 
33 /* Memory configurations */
34 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCDK */
35 
36 /* Booting Linux */
37 #define CONFIG_BOOTDELAY	3
38 #define CONFIG_BOOTFILE		"zImage"
39 #define CONFIG_BOOTARGS		"console=ttyS0," __stringify(CONFIG_BAUDRATE)
40 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
41 #define CONFIG_BOOTCOMMAND	"run ramboot"
42 #else
43 #define CONFIG_BOOTCOMMAND	"run mmcload; run mmcboot"
44 #endif
45 #define CONFIG_LOADADDR		0x01000000
46 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
47 
48 /* Ethernet on SoC (EMAC) */
49 #if defined(CONFIG_CMD_NET)
50 #define CONFIG_PHY_MICREL
51 #define CONFIG_PHY_MICREL_KSZ9021
52 #endif
53 
54 #define CONFIG_ENV_IS_IN_MMC
55 #define CONFIG_SYS_MMC_ENV_DEV		0	/* device 0 */
56 #define CONFIG_ENV_OFFSET		512	/* just after the MBR */
57 
58 /* USB */
59 #ifdef CONFIG_CMD_USB
60 #define CONFIG_USB_DWC2_REG_ADDR	SOCFPGA_USB1_ADDRESS
61 #endif
62 #define CONFIG_G_DNL_MANUFACTURER      "Altera"
63 
64 /* Extra Environment */
65 #define CONFIG_HOSTNAME		socfpga_cyclone5
66 
67 #define CONFIG_EXTRA_ENV_SETTINGS \
68 	"verify=n\0" \
69 	"loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
70 	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
71 		"bootm ${loadaddr} - ${fdt_addr}\0" \
72 	"bootimage=zImage\0" \
73 	"fdt_addr=100\0" \
74 	"fdtimage=socfpga.dtb\0" \
75 	"bootm ${loadaddr} - ${fdt_addr}\0" \
76 	"mmcroot=/dev/mmcblk0p2\0" \
77 	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
78 		" root=${mmcroot} rw rootwait;" \
79 		"bootz ${loadaddr} - ${fdt_addr}\0" \
80 	"mmcload=mmc rescan;" \
81 		"load mmc 0:1 ${loadaddr} ${bootimage};" \
82 		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
83 	"qspiroot=/dev/mtdblock0\0" \
84 	"qspirootfstype=jffs2\0" \
85 	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
86 		" root=${qspiroot} rw rootfstype=${qspirootfstype};"\
87 		"bootm ${loadaddr} - ${fdt_addr}\0"
88 
89 /* The rest of the configuration is shared */
90 #include <configs/socfpga_common.h>
91 
92 #endif	/* __CONFIG_SOCFPGA_CYCLONE5_H__ */
93