1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 23cbc7b87SDinh Nguyen /* 33cbc7b87SDinh Nguyen * Copyright (C) 2014 Marek Vasut <marex@denx.de> 43cbc7b87SDinh Nguyen */ 53cbc7b87SDinh Nguyen #ifndef __CONFIG_SOCFPGA_CYCLONE5_H__ 63cbc7b87SDinh Nguyen #define __CONFIG_SOCFPGA_CYCLONE5_H__ 73cbc7b87SDinh Nguyen 8871c24bcSDinh Nguyen #include <asm/arch/base_addr_ac5.h> 93cbc7b87SDinh Nguyen 103cbc7b87SDinh Nguyen /* Memory configurations */ 113cbc7b87SDinh Nguyen #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ 123cbc7b87SDinh Nguyen 133cbc7b87SDinh Nguyen /* Booting Linux */ 143cbc7b87SDinh Nguyen #define CONFIG_LOADADDR 0x01000000 153cbc7b87SDinh Nguyen #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 163cbc7b87SDinh Nguyen 173cbc7b87SDinh Nguyen /* Ethernet on SoC (EMAC) */ 183cbc7b87SDinh Nguyen 193cbc7b87SDinh Nguyen /* The rest of the configuration is shared */ 203cbc7b87SDinh Nguyen #include <configs/socfpga_common.h> 213cbc7b87SDinh Nguyen 223cbc7b87SDinh Nguyen #endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */ 23