1 /* 2 * Copyright (C) 2014 Marek Vasut <marex@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #ifndef __CONFIG_SOCFPGA_ARRIA5_H__ 7 #define __CONFIG_SOCFPGA_ARRIA5_H__ 8 9 #include <asm/arch/base_addr_ac5.h> 10 11 /* U-Boot Commands */ 12 #define CONFIG_SYS_NO_FLASH 13 #define CONFIG_DOS_PARTITION 14 #define CONFIG_FAT_WRITE 15 #define CONFIG_HW_WATCHDOG 16 17 #define CONFIG_CMD_ASKENV 18 #define CONFIG_CMD_BOOTZ 19 #define CONFIG_CMD_CACHE 20 #define CONFIG_CMD_DFU 21 #define CONFIG_CMD_DHCP 22 #define CONFIG_CMD_EXT4 23 #define CONFIG_CMD_EXT4_WRITE 24 #define CONFIG_CMD_FAT 25 #define CONFIG_CMD_FS_GENERIC 26 #define CONFIG_CMD_GREPENV 27 #define CONFIG_CMD_MII 28 #define CONFIG_CMD_MMC 29 #define CONFIG_CMD_PING 30 #define CONFIG_CMD_USB 31 #define CONFIG_CMD_USB_MASS_STORAGE 32 33 /* Memory configurations */ 34 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ 35 36 /* Booting Linux */ 37 #define CONFIG_BOOTDELAY 3 38 #define CONFIG_BOOTFILE "zImage" 39 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) 40 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET 41 #define CONFIG_BOOTCOMMAND "run ramboot" 42 #else 43 #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" 44 #endif 45 #define CONFIG_LOADADDR 0x01000000 46 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 47 48 /* Ethernet on SoC (EMAC) */ 49 #if defined(CONFIG_CMD_NET) 50 #define CONFIG_PHY_MICREL 51 #define CONFIG_PHY_MICREL_KSZ9021 52 #endif 53 54 #define CONFIG_ENV_IS_IN_MMC 55 #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ 56 #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ 57 58 /* USB */ 59 #define CONFIG_G_DNL_MANUFACTURER "Altera" 60 61 /* Extra Environment */ 62 #define CONFIG_HOSTNAME socfpga_arria5 63 64 #define CONFIG_EXTRA_ENV_SETTINGS \ 65 "verify=n\0" \ 66 "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ 67 "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ 68 "bootm ${loadaddr} - ${fdt_addr}\0" \ 69 "bootimage=zImage\0" \ 70 "fdt_addr=100\0" \ 71 "fdtimage=socfpga.dtb\0" \ 72 "bootm ${loadaddr} - ${fdt_addr}\0" \ 73 "mmcroot=/dev/mmcblk0p2\0" \ 74 "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ 75 " root=${mmcroot} rw rootwait;" \ 76 "bootz ${loadaddr} - ${fdt_addr}\0" \ 77 "mmcload=mmc rescan;" \ 78 "load mmc 0:1 ${loadaddr} ${bootimage};" \ 79 "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ 80 "qspiroot=/dev/mtdblock0\0" \ 81 "qspirootfstype=jffs2\0" \ 82 "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ 83 " root=${qspiroot} rw rootfstype=${qspirootfstype};"\ 84 "bootm ${loadaddr} - ${fdt_addr}\0" 85 86 /* The rest of the configuration is shared */ 87 #include <configs/socfpga_common.h> 88 89 #endif /* __CONFIG_SOCFPGA_ARRIA5_H__ */ 90