1 /* 2 * Copyright (C) 2014 Marek Vasut <marex@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #ifndef __CONFIG_SOCFPGA_ARRIA5_H__ 7 #define __CONFIG_SOCFPGA_ARRIA5_H__ 8 9 #include <asm/arch/base_addr_ac5.h> 10 11 /* U-Boot Commands */ 12 #define CONFIG_SYS_NO_FLASH 13 #define CONFIG_FAT_WRITE 14 #define CONFIG_HW_WATCHDOG 15 16 /* Memory configurations */ 17 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ 18 19 /* Booting Linux */ 20 #define CONFIG_BOOTFILE "zImage" 21 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) 22 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET 23 #define CONFIG_BOOTCOMMAND "run ramboot" 24 #else 25 #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" 26 #endif 27 #define CONFIG_LOADADDR 0x01000000 28 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 29 30 /* Ethernet on SoC (EMAC) */ 31 #if defined(CONFIG_CMD_NET) 32 #define CONFIG_PHY_MICREL 33 #define CONFIG_PHY_MICREL_KSZ9021 34 #endif 35 36 #define CONFIG_ENV_IS_IN_MMC 37 38 /* Extra Environment */ 39 #define CONFIG_EXTRA_ENV_SETTINGS \ 40 "verify=n\0" \ 41 "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ 42 "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ 43 "bootm ${loadaddr} - ${fdt_addr}\0" \ 44 "bootimage=zImage\0" \ 45 "fdt_addr=100\0" \ 46 "fdtimage=socfpga.dtb\0" \ 47 "bootm ${loadaddr} - ${fdt_addr}\0" \ 48 "mmcroot=/dev/mmcblk0p2\0" \ 49 "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ 50 " root=${mmcroot} rw rootwait;" \ 51 "bootz ${loadaddr} - ${fdt_addr}\0" \ 52 "mmcload=mmc rescan;" \ 53 "load mmc 0:1 ${loadaddr} ${bootimage};" \ 54 "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ 55 "qspiload=sf probe && mtdparts default && run ubiload\0" \ 56 "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ 57 " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\ 58 "bootz ${loadaddr} - ${fdt_addr}\0" \ 59 "ubiload=ubi part UBI && ubifsmount ubi0 && " \ 60 "ubifsload ${loadaddr} /boot/${bootimage} && " \ 61 "ubifsload ${fdt_addr} /boot/${fdtimage}\0" 62 63 /* The rest of the configuration is shared */ 64 #include <configs/socfpga_common.h> 65 66 #endif /* __CONFIG_SOCFPGA_ARRIA5_H__ */ 67