1 /* 2 * Copyright (C) 2015-2017 Altera Corporation <www.altera.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef __CONFIG_SOCFGPA_ARRIA10_H__ 8 #define __CONFIG_SOCFGPA_ARRIA10_H__ 9 10 #include <asm/arch/base_addr_a10.h> 11 12 #define CONFIG_HW_WATCHDOG 13 14 /* Booting Linux */ 15 #define CONFIG_LOADADDR 0x01000000 16 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 17 18 /* 19 * U-Boot general configurations 20 */ 21 /* Cache options */ 22 #define CONFIG_SYS_DCACHE_OFF 23 24 /* Memory configurations */ 25 #define PHYS_SDRAM_1_SIZE 0x40000000 26 27 /* Ethernet on SoC (EMAC) */ 28 29 /* 30 * U-Boot environment configurations 31 */ 32 33 /* 34 * arguments passed to the bootz command. The value of 35 * CONFIG_BOOTARGS goes into the environment value "bootargs". 36 * Do note the value will overide also the chosen node in FDT blob. 37 */ 38 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) 39 40 /* 41 * Serial / UART configurations 42 */ 43 #define CONFIG_SYS_NS16550_MEM32 44 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} 45 46 /* 47 * L4 OSC1 Timer 0 48 */ 49 /* reload value when timer count to zero */ 50 #define TIMER_LOAD_VAL 0xFFFFFFFF 51 52 /* 53 * Flash configurations 54 */ 55 #define CONFIG_SYS_MAX_FLASH_BANKS 1 56 57 /* The rest of the configuration is shared */ 58 #include <configs/socfpga_common.h> 59 60 #endif /* __CONFIG_SOCFGPA_ARRIA10_H__ */ 61