1 /*
2  *  Copyright (C) 2015-2017 Altera Corporation <www.altera.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0
5  */
6 
7 #ifndef __CONFIG_SOCFGPA_ARRIA10_H__
8 #define __CONFIG_SOCFGPA_ARRIA10_H__
9 
10 #include <asm/arch/base_addr_a10.h>
11 
12 #define CONFIG_HW_WATCHDOG
13 
14 /* Booting Linux */
15 #define CONFIG_LOADADDR		0x01000000
16 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
17 
18 /*
19  * U-Boot general configurations
20  */
21 /* Cache options */
22 #define CONFIG_SYS_DCACHE_OFF
23 
24 /* Memory configurations  */
25 #define PHYS_SDRAM_1_SIZE		0x40000000
26 
27 /* Ethernet on SoC (EMAC) */
28 
29 /*
30  * U-Boot environment configurations
31  */
32 
33 /*
34  * Serial / UART configurations
35  */
36 #define CONFIG_SYS_NS16550_MEM32
37 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
38 
39 /*
40  * L4 OSC1 Timer 0
41  */
42 /* reload value when timer count to zero */
43 #define TIMER_LOAD_VAL			0xFFFFFFFF
44 
45 /*
46  * Flash configurations
47  */
48 #define CONFIG_SYS_MAX_FLASH_BANKS     1
49 
50 /* The rest of the configuration is shared */
51 #include <configs/socfpga_common.h>
52 
53 #endif	/* __CONFIG_SOCFGPA_ARRIA10_H__ */
54