1 /*
2  * Bluewater Systems Snapper 9G45 module
3  *
4  * (C) Copyright 2011 Bluewater Systems
5  *   Author: Andre Renaud <andre@bluewatersys.com>
6  *   Author: Ryan Mallon <ryan@bluewatersys.com>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13 
14 /* SoC type is defined in boards.cfg */
15 #include <asm/hardware.h>
16 #include <linux/sizes.h>
17 
18 /* ARM asynchronous clock */
19 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
20 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
21 
22 /* CPU */
23 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
24 #define CONFIG_SETUP_MEMORY_TAGS
25 #define CONFIG_INITRD_TAG
26 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
27 
28 /* SDRAM */
29 #define CONFIG_NR_DRAM_BANKS		1
30 #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS6
31 #define CONFIG_SYS_SDRAM_SIZE		(128 * 1024 * 1024) /* 64MB */
32 #define CONFIG_SYS_INIT_SP_ADDR		(ATMEL_BASE_SRAM + 0x1000 - \
33 					 GENERATED_GBL_DATA_SIZE)
34 
35 /* Mem test settings */
36 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
37 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
38 
39 /* NAND Flash */
40 #define CONFIG_NAND_ATMEL
41 #define CONFIG_ATMEL_NAND_HWECC
42 #define CONFIG_SYS_NAND_ECC_BASE	ATMEL_BASE_ECC
43 #define CONFIG_SYS_MAX_NAND_DEVICE	1
44 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
45 #define CONFIG_SYS_NAND_DBW_8
46 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21) /* AD21 */
47 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22) /* AD22 */
48 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
49 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC8
50 
51 /* Ethernet */
52 #define CONFIG_MACB
53 #define CONFIG_RMII
54 #define CONFIG_NET_RETRY_COUNT		20
55 #define CONFIG_RESET_PHY_R
56 #define CONFIG_AT91_WANTS_COMMON_PHY
57 #define CONFIG_TFTP_PORT
58 #define CONFIG_TFTP_TSIZE
59 
60 /* MMC */
61 #define CONFIG_GENERIC_ATMEL_MCI
62 
63 /* LCD */
64 #define CONFIG_ATMEL_LCD
65 #define CONFIG_GURNARD_SPLASH
66 
67 #define CONFIG_ATMEL_SPI
68 
69 /* GPIOs and IO expander */
70 #define CONFIG_ATMEL_LEGACY
71 #define CONFIG_AT91_GPIO
72 #define CONFIG_AT91_GPIO_PULLUP		1
73 
74 /* UARTs/Serial console */
75 #define CONFIG_ATMEL_USART
76 
77 /* Boot options */
78 #define CONFIG_SYS_LOAD_ADDR		0x23000000
79 
80 #define CONFIG_BOOTP_BOOTFILESIZE
81 
82 /* Environment settings */
83 #define CONFIG_ENV_OFFSET		(512 << 10)
84 #define CONFIG_ENV_SIZE			(256 << 10)
85 #define CONFIG_ENV_OVERWRITE
86 
87 #define	CONFIG_EXTRA_ENV_SETTINGS	\
88 	"ethaddr=00:00:00:00:00:00\0" \
89 	"serial=0\0" \
90 	"stdout=serial_atmel\0" \
91 	"stderr=serial_atmel\0" \
92 	"stdin=serial_atmel\0" \
93 	"bootlimit=3\0" \
94 	"loadaddr=0x71000000\0" \
95 	"board_rev=2\0" \
96 	"bootfile=/tftpboot/uImage\0" \
97 	"bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \
98 	"nfsroot=/export/root\0" \
99 	"boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \
100 	"boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \
101 	"boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \
102 	"boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \
103 	"boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \
104 	"bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \
105 	"altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"
106 
107 /* Console settings */
108 
109 /* U-Boot memory settings */
110 #define CONFIG_SYS_MALLOC_LEN		(1 << 20)
111 
112 /* Command line configuration */
113 #define CONFIG_CMD_MII
114 #define CONFIG_CMD_MMC
115 #define CONFIG_CMD_CACHE
116 
117 #endif /* __CONFIG_H */
118