1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Bluewater Systems Snapper 9G45 module
4  *
5  * (C) Copyright 2011 Bluewater Systems
6  *   Author: Andre Renaud <andre@bluewatersys.com>
7  *   Author: Ryan Mallon <ryan@bluewatersys.com>
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 /* SoC type is defined in boards.cfg */
14 #include <asm/hardware.h>
15 #include <linux/sizes.h>
16 
17 /* ARM asynchronous clock */
18 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
19 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
20 
21 /* CPU */
22 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
23 #define CONFIG_SETUP_MEMORY_TAGS
24 #define CONFIG_INITRD_TAG
25 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
26 
27 /* SDRAM */
28 #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS6
29 #define CONFIG_SYS_SDRAM_SIZE		(128 * 1024 * 1024) /* 64MB */
30 #define CONFIG_SYS_INIT_SP_ADDR		(ATMEL_BASE_SRAM + 0x1000 - \
31 					 GENERATED_GBL_DATA_SIZE)
32 
33 /* Mem test settings */
34 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
35 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
36 
37 /* NAND Flash */
38 #define CONFIG_SYS_NAND_ECC_BASE	ATMEL_BASE_ECC
39 #define CONFIG_SYS_MAX_NAND_DEVICE	1
40 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
41 #define CONFIG_SYS_NAND_DBW_8
42 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21) /* AD21 */
43 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22) /* AD22 */
44 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
45 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC8
46 
47 /* Ethernet */
48 #define CONFIG_MACB
49 #define CONFIG_RMII
50 #define CONFIG_NET_RETRY_COUNT		20
51 #define CONFIG_RESET_PHY_R
52 #define CONFIG_AT91_WANTS_COMMON_PHY
53 #define CONFIG_TFTP_PORT
54 #define CONFIG_TFTP_TSIZE
55 
56 /* MMC */
57 #define CONFIG_GENERIC_ATMEL_MCI
58 
59 /* LCD */
60 #define CONFIG_ATMEL_LCD
61 #define CONFIG_GURNARD_SPLASH
62 
63 /* GPIOs and IO expander */
64 #define CONFIG_ATMEL_LEGACY
65 #define CONFIG_AT91_GPIO
66 #define CONFIG_AT91_GPIO_PULLUP		1
67 
68 /* UARTs/Serial console */
69 #define CONFIG_ATMEL_USART
70 
71 /* Boot options */
72 #define CONFIG_SYS_LOAD_ADDR		0x23000000
73 
74 #define CONFIG_BOOTP_BOOTFILESIZE
75 
76 /* Environment settings */
77 #define CONFIG_ENV_OFFSET		(512 << 10)
78 #define CONFIG_ENV_SIZE			(256 << 10)
79 #define CONFIG_ENV_OVERWRITE
80 
81 #define	CONFIG_EXTRA_ENV_SETTINGS	\
82 	"ethaddr=00:00:00:00:00:00\0" \
83 	"serial=0\0" \
84 	"stdout=serial_atmel\0" \
85 	"stderr=serial_atmel\0" \
86 	"stdin=serial_atmel\0" \
87 	"bootlimit=3\0" \
88 	"loadaddr=0x71000000\0" \
89 	"board_rev=2\0" \
90 	"bootfile=/tftpboot/uImage\0" \
91 	"bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \
92 	"nfsroot=/export/root\0" \
93 	"boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \
94 	"boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \
95 	"boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \
96 	"boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \
97 	"boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \
98 	"bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \
99 	"altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"
100 
101 /* Console settings */
102 
103 /* U-Boot memory settings */
104 #define CONFIG_SYS_MALLOC_LEN		(1 << 20)
105 
106 /* Command line configuration */
107 #define CONFIG_CMD_MII
108 #define CONFIG_CMD_MMC
109 #define CONFIG_CMD_CACHE
110 
111 #endif /* __CONFIG_H */
112