1 /*
2  * Bluewater Systems Snapper 9260 and 9G20 modules
3  *
4  * (C) Copyright 2011 Bluewater Systems
5  *   Author: Andre Renaud <andre@bluewatersys.com>
6  *   Author: Ryan Mallon <ryan@bluewatersys.com>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13 
14 /* SoC type is defined in boards.cfg */
15 #include <asm/hardware.h>
16 #include <linux/sizes.h>
17 
18 #define CONFIG_SYS_TEXT_BASE		0x21f00000
19 
20 /* ARM asynchronous clock */
21 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000 /* External Crystal, in Hz */
22 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
23 
24 /* CPU */
25 #define CONFIG_ARCH_CPU_INIT
26 
27 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30 #define CONFIG_SKIP_LOWLEVEL_INIT
31 
32 /* SDRAM */
33 #define CONFIG_NR_DRAM_BANKS		1
34 #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
35 #define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024) /* 64MB */
36 #define CONFIG_SYS_INIT_SP_ADDR		(ATMEL_BASE_SRAM1 + 0x1000 - \
37 					 GENERATED_GBL_DATA_SIZE)
38 
39 /* Mem test settings */
40 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
41 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
42 
43 /* NAND Flash */
44 #define CONFIG_NAND_ATMEL
45 #define CONFIG_SYS_NO_FLASH
46 #define CONFIG_SYS_MAX_NAND_DEVICE	1
47 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
48 #define CONFIG_SYS_NAND_DBW_8
49 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21) /* AD21 */
50 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22) /* AD22 */
51 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
52 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
53 
54 /* Ethernet */
55 #define CONFIG_MACB
56 #define CONFIG_RMII
57 #define CONFIG_NET_RETRY_COUNT		20
58 #define CONFIG_RESET_PHY_R
59 #define CONFIG_AT91_WANTS_COMMON_PHY
60 #define CONFIG_TFTP_PORT
61 #define CONFIG_TFTP_TSIZE
62 
63 /* USB */
64 #define CONFIG_USB_ATMEL
65 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
66 #define CONFIG_USB_OHCI_NEW
67 #define CONFIG_DOS_PARTITION
68 #define CONFIG_SYS_USB_OHCI_CPU_INIT
69 #define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_UHP_BASE
70 #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9260"
71 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
72 
73 /* GPIOs and IO expander */
74 #define CONFIG_ATMEL_LEGACY
75 #define CONFIG_AT91_GPIO
76 #define CONFIG_AT91_GPIO_PULLUP		1
77 #define CONFIG_PCA953X
78 #define CONFIG_SYS_I2C_PCA953X_ADDR	0x28
79 #define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x28, 16} }
80 
81 /* UARTs/Serial console */
82 #define CONFIG_ATMEL_USART
83 #ifndef CONFIG_DM_SERIAL
84 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
85 #define CONFIG_USART_ID			ATMEL_ID_SYS
86 #endif
87 #define CONFIG_BAUDRATE			115200
88 
89 /* I2C - Bit-bashed */
90 #define CONFIG_SYS_I2C
91 #define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
92 #define CONFIG_SYS_I2C_SOFT_SPEED	100000
93 #define CONFIG_SYS_I2C_SOFT_SLAVE	0x7F
94 #define CONFIG_SOFT_I2C_READ_REPEATED_START
95 #define I2C_INIT do {							\
96 		at91_set_gpio_output(AT91_PIN_PA23, 1);			\
97 		at91_set_gpio_output(AT91_PIN_PA24, 1);			\
98 		at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1);	\
99 		at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1);	\
100 	} while (0)
101 #define I2C_SOFT_DECLARATIONS
102 #define I2C_ACTIVE
103 #define I2C_TRISTATE	at91_set_gpio_input(AT91_PIN_PA23, 1);
104 #define I2C_READ	at91_get_gpio_value(AT91_PIN_PA23);
105 #define I2C_SDA(bit) do {						\
106 		if (bit) {						\
107 			at91_set_gpio_input(AT91_PIN_PA23, 1);		\
108 		} else {						\
109 			at91_set_gpio_output(AT91_PIN_PA23, 1);		\
110 			at91_set_gpio_value(AT91_PIN_PA23, bit);	\
111 		}							\
112 	} while (0)
113 #define I2C_SCL(bit)	at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
114 #define I2C_DELAY	udelay(2)
115 
116 /* Boot options */
117 #define CONFIG_SYS_LOAD_ADDR		0x23000000
118 
119 #define CONFIG_BOOTP_BOOTFILESIZE
120 #define CONFIG_BOOTP_BOOTPATH
121 #define CONFIG_BOOTP_GATEWAY
122 #define CONFIG_BOOTP_HOSTNAME
123 
124 /* Environment settings */
125 #define CONFIG_ENV_IS_IN_NAND
126 #define CONFIG_ENV_OFFSET		(512 << 10)
127 #define CONFIG_ENV_SIZE			(256 << 10)
128 #define CONFIG_ENV_OVERWRITE
129 #define CONFIG_BOOTARGS			"console=ttyS0,115200 ip=any"
130 
131 /* Console settings */
132 #define CONFIG_SYS_CBSIZE		256
133 #define CONFIG_SYS_MAXARGS		16
134 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE +		\
135 					 sizeof(CONFIG_SYS_PROMPT) + 16)
136 #define CONFIG_SYS_LONGHELP
137 #define CONFIG_CMDLINE_EDITING
138 #define CONFIG_AUTO_COMPLETE
139 
140 /* U-Boot memory settings */
141 #define CONFIG_SYS_MALLOC_LEN		(1 << 20)
142 
143 /* Command line configuration */
144 #define CONFIG_CMD_NAND
145 #define CONFIG_CMD_PCA953X
146 #define CONFIG_CMD_PCA953X_INFO
147 
148 #endif /* __CONFIG_H */
149