1 /*
2  * Bluewater Systems Snapper 9260 and 9G20 modules
3  *
4  * (C) Copyright 2011 Bluewater Systems
5  *   Author: Andre Renaud <andre@bluewatersys.com>
6  *   Author: Ryan Mallon <ryan@bluewatersys.com>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13 
14 /* SoC type is defined in boards.cfg */
15 #include <asm/hardware.h>
16 #include <linux/sizes.h>
17 
18 #define CONFIG_SYS_TEXT_BASE		0x21f00000
19 
20 /* ARM asynchronous clock */
21 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000 /* External Crystal, in Hz */
22 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
23 
24 /* CPU */
25 #define CONFIG_ARCH_CPU_INIT
26 
27 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30 #define CONFIG_SKIP_LOWLEVEL_INIT
31 
32 /* SDRAM */
33 #define CONFIG_NR_DRAM_BANKS		1
34 #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
35 #define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024) /* 64MB */
36 #define CONFIG_SYS_INIT_SP_ADDR		(ATMEL_BASE_SRAM1 + 0x1000 - \
37 					 GENERATED_GBL_DATA_SIZE)
38 
39 /* Mem test settings */
40 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
41 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
42 
43 /* NAND Flash */
44 #define CONFIG_NAND_ATMEL
45 #define CONFIG_SYS_MAX_NAND_DEVICE	1
46 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
47 #define CONFIG_SYS_NAND_DBW_8
48 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21) /* AD21 */
49 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22) /* AD22 */
50 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
51 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
52 
53 /* Ethernet */
54 #define CONFIG_MACB
55 #define CONFIG_RMII
56 #define CONFIG_NET_RETRY_COUNT		20
57 #define CONFIG_RESET_PHY_R
58 #define CONFIG_AT91_WANTS_COMMON_PHY
59 #define CONFIG_TFTP_PORT
60 #define CONFIG_TFTP_TSIZE
61 
62 /* USB */
63 #define CONFIG_USB_ATMEL
64 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
65 #define CONFIG_USB_OHCI_NEW
66 #define CONFIG_SYS_USB_OHCI_CPU_INIT
67 #define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_UHP_BASE
68 #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9260"
69 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
70 
71 /* GPIOs and IO expander */
72 #define CONFIG_ATMEL_LEGACY
73 #define CONFIG_AT91_GPIO
74 #define CONFIG_AT91_GPIO_PULLUP		1
75 #define CONFIG_PCA953X
76 #define CONFIG_SYS_I2C_PCA953X_ADDR	0x28
77 #define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x28, 16} }
78 
79 /* UARTs/Serial console */
80 #define CONFIG_ATMEL_USART
81 #ifndef CONFIG_DM_SERIAL
82 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
83 #define CONFIG_USART_ID			ATMEL_ID_SYS
84 #endif
85 
86 /* I2C - Bit-bashed */
87 #define CONFIG_SYS_I2C
88 #define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
89 #define CONFIG_SYS_I2C_SOFT_SPEED	100000
90 #define CONFIG_SYS_I2C_SOFT_SLAVE	0x7F
91 #define CONFIG_SOFT_I2C_READ_REPEATED_START
92 #define I2C_INIT do {							\
93 		at91_set_gpio_output(AT91_PIN_PA23, 1);			\
94 		at91_set_gpio_output(AT91_PIN_PA24, 1);			\
95 		at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1);	\
96 		at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1);	\
97 	} while (0)
98 #define I2C_SOFT_DECLARATIONS
99 #define I2C_ACTIVE
100 #define I2C_TRISTATE	at91_set_gpio_input(AT91_PIN_PA23, 1);
101 #define I2C_READ	at91_get_gpio_value(AT91_PIN_PA23);
102 #define I2C_SDA(bit) do {						\
103 		if (bit) {						\
104 			at91_set_gpio_input(AT91_PIN_PA23, 1);		\
105 		} else {						\
106 			at91_set_gpio_output(AT91_PIN_PA23, 1);		\
107 			at91_set_gpio_value(AT91_PIN_PA23, bit);	\
108 		}							\
109 	} while (0)
110 #define I2C_SCL(bit)	at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
111 #define I2C_DELAY	udelay(2)
112 
113 /* Boot options */
114 #define CONFIG_SYS_LOAD_ADDR		0x23000000
115 
116 #define CONFIG_BOOTP_BOOTFILESIZE
117 #define CONFIG_BOOTP_BOOTPATH
118 #define CONFIG_BOOTP_GATEWAY
119 #define CONFIG_BOOTP_HOSTNAME
120 
121 /* Environment settings */
122 #define CONFIG_ENV_IS_IN_NAND
123 #define CONFIG_ENV_OFFSET		(512 << 10)
124 #define CONFIG_ENV_SIZE			(256 << 10)
125 #define CONFIG_ENV_OVERWRITE
126 #define CONFIG_BOOTARGS			"console=ttyS0,115200 ip=any"
127 
128 /* Console settings */
129 #define CONFIG_SYS_CBSIZE		256
130 #define CONFIG_SYS_MAXARGS		16
131 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE +		\
132 					 sizeof(CONFIG_SYS_PROMPT) + 16)
133 #define CONFIG_SYS_LONGHELP
134 #define CONFIG_CMDLINE_EDITING
135 #define CONFIG_AUTO_COMPLETE
136 
137 /* U-Boot memory settings */
138 #define CONFIG_SYS_MALLOC_LEN		(1 << 20)
139 
140 /* Command line configuration */
141 #define CONFIG_CMD_NAND
142 #define CONFIG_CMD_PCA953X
143 #define CONFIG_CMD_PCA953X_INFO
144 
145 #endif /* __CONFIG_H */
146