1 /* 2 * Bluewater Systems Snapper 9260 and 9G20 modules 3 * 4 * (C) Copyright 2011 Bluewater Systems 5 * Author: Andre Renaud <andre@bluewatersys.com> 6 * Author: Ryan Mallon <ryan@bluewatersys.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* SoC type is defined in boards.cfg */ 15 #include <asm/hardware.h> 16 #include <linux/sizes.h> 17 18 #define CONFIG_SYS_TEXT_BASE 0x21f00000 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */ 22 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 23 #define CONFIG_SYS_GENERIC_BOARD 24 #define CONFIG_DM 25 #define CONFIG_CMD_DM 26 #define CONFIG_DM_GPIO 27 #define CONFIG_DM_SERIAL 28 #define CONFIG_SYS_MALLOC_F_LEN (1 << 10) 29 30 /* CPU */ 31 #define CONFIG_ARCH_CPU_INIT 32 33 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 34 #define CONFIG_SETUP_MEMORY_TAGS 35 #define CONFIG_INITRD_TAG 36 #define CONFIG_SKIP_LOWLEVEL_INIT 37 #define CONFIG_SKIP_RELOCATE_UBOOT 38 #define CONFIG_DISPLAY_CPUINFO 39 #define CONFIG_FIT 40 41 /* SDRAM */ 42 #define CONFIG_NR_DRAM_BANKS 1 43 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 44 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */ 45 #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \ 46 GENERATED_GBL_DATA_SIZE) 47 48 /* Mem test settings */ 49 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 50 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024)) 51 52 /* NAND Flash */ 53 #define CONFIG_NAND_ATMEL 54 #define CONFIG_SYS_NO_FLASH 55 #define CONFIG_SYS_MAX_NAND_DEVICE 1 56 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 57 #define CONFIG_SYS_NAND_DBW_8 58 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ 59 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ 60 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 61 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 62 63 /* Ethernet */ 64 #define CONFIG_MACB 65 #define CONFIG_RMII 66 #define CONFIG_NET_RETRY_COUNT 20 67 #define CONFIG_RESET_PHY_R 68 #define CONFIG_AT91_WANTS_COMMON_PHY 69 #define CONFIG_TFTP_PORT 70 #define CONFIG_TFTP_TSIZE 71 72 /* USB */ 73 #define CONFIG_USB_ATMEL 74 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 75 #define CONFIG_USB_OHCI_NEW 76 #define CONFIG_DOS_PARTITION 77 #define CONFIG_SYS_USB_OHCI_CPU_INIT 78 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE 79 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 80 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 81 #define CONFIG_USB_STORAGE 82 83 /* GPIOs and IO expander */ 84 #define CONFIG_ATMEL_LEGACY 85 #define CONFIG_AT91_GPIO 86 #define CONFIG_AT91_GPIO_PULLUP 1 87 #define CONFIG_PCA953X 88 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x28 89 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} } 90 91 /* UARTs/Serial console */ 92 #define CONFIG_ATMEL_USART 93 #ifndef CONFIG_DM_SERIAL 94 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 95 #define CONFIG_USART_ID ATMEL_ID_SYS 96 #endif 97 #define CONFIG_BAUDRATE 115200 98 #define CONFIG_SYS_PROMPT "Snapper> " 99 100 /* I2C - Bit-bashed */ 101 #define CONFIG_SYS_I2C 102 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 103 #define CONFIG_SYS_I2C_SOFT_SPEED 100000 104 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F 105 #define CONFIG_SOFT_I2C_READ_REPEATED_START 106 #define I2C_INIT do { \ 107 at91_set_gpio_output(AT91_PIN_PA23, 1); \ 108 at91_set_gpio_output(AT91_PIN_PA24, 1); \ 109 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \ 110 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \ 111 } while (0) 112 #define I2C_SOFT_DECLARATIONS 113 #define I2C_ACTIVE 114 #define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1); 115 #define I2C_READ at91_get_gpio_value(AT91_PIN_PA23); 116 #define I2C_SDA(bit) do { \ 117 if (bit) { \ 118 at91_set_gpio_input(AT91_PIN_PA23, 1); \ 119 } else { \ 120 at91_set_gpio_output(AT91_PIN_PA23, 1); \ 121 at91_set_gpio_value(AT91_PIN_PA23, bit); \ 122 } \ 123 } while (0) 124 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit) 125 #define I2C_DELAY udelay(2) 126 127 /* Boot options */ 128 #define CONFIG_SYS_LOAD_ADDR 0x23000000 129 #define CONFIG_BOOTDELAY 3 130 #define CONFIG_ZERO_BOOTDELAY_CHECK 131 132 #define CONFIG_BOOTP_BOOTFILESIZE 133 #define CONFIG_BOOTP_BOOTPATH 134 #define CONFIG_BOOTP_GATEWAY 135 #define CONFIG_BOOTP_HOSTNAME 136 137 /* Environment settings */ 138 #define CONFIG_ENV_IS_IN_NAND 139 #define CONFIG_ENV_OFFSET (512 << 10) 140 #define CONFIG_ENV_SIZE (256 << 10) 141 #define CONFIG_ENV_OVERWRITE 142 #define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any" 143 144 /* Console settings */ 145 #define CONFIG_SYS_CBSIZE 256 146 #define CONFIG_SYS_MAXARGS 16 147 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 148 sizeof(CONFIG_SYS_PROMPT) + 16) 149 #define CONFIG_SYS_LONGHELP 150 #define CONFIG_CMDLINE_EDITING 151 #define CONFIG_AUTO_COMPLETE 152 #define CONFIG_SYS_HUSH_PARSER 153 154 /* U-Boot memory settings */ 155 #define CONFIG_SYS_MALLOC_LEN (1 << 20) 156 157 /* Command line configuration */ 158 #include <config_cmd_default.h> 159 #undef CONFIG_CMD_BDI 160 #undef CONFIG_CMD_FPGA 161 #undef CONFIG_CMD_IMI 162 #undef CONFIG_CMD_IMLS 163 #undef CONFIG_CMD_LOADS 164 #undef CONFIG_CMD_SOURCE 165 166 #define CONFIG_CMD_PING 167 #define CONFIG_CMD_DHCP 168 #define CONFIG_CMD_FAT 169 #define CONFIG_CMD_I2C 170 #define CONFIG_CMD_GPIO 171 #define CONFIG_CMD_USB 172 #define CONFIG_CMD_MII 173 #define CONFIG_CMD_NAND 174 #define CONFIG_CMD_PCA953X 175 #define CONFIG_CMD_PCA953X_INFO 176 177 #endif /* __CONFIG_H */ 178