1 /* 2 * Bluewater Systems Snapper 9260 and 9G20 modules 3 * 4 * (C) Copyright 2011 Bluewater Systems 5 * Author: Andre Renaud <andre@bluewatersys.com> 6 * Author: Ryan Mallon <ryan@bluewatersys.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* SoC type is defined in boards.cfg */ 15 #include <asm/hardware.h> 16 #include <asm/sizes.h> 17 18 #define CONFIG_SYS_TEXT_BASE 0x20000000 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */ 22 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 23 24 /* CPU */ 25 #define CONFIG_ARCH_CPU_INIT 26 27 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 28 #define CONFIG_SETUP_MEMORY_TAGS 29 #define CONFIG_INITRD_TAG 30 #define CONFIG_SKIP_LOWLEVEL_INIT 31 #define CONFIG_SKIP_RELOCATE_UBOOT 32 #define CONFIG_DISPLAY_CPUINFO 33 #define CONFIG_FIT 34 35 /* SDRAM */ 36 #define CONFIG_NR_DRAM_BANKS 1 37 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 38 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */ 39 #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \ 40 GENERATED_GBL_DATA_SIZE) 41 42 /* Mem test settings */ 43 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 44 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024)) 45 46 /* NAND Flash */ 47 #define CONFIG_NAND_ATMEL 48 #define CONFIG_SYS_NO_FLASH 49 #define CONFIG_SYS_MAX_NAND_DEVICE 1 50 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 51 #define CONFIG_SYS_NAND_DBW_8 52 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ 53 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ 54 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 55 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 56 57 /* Ethernet */ 58 #define CONFIG_MACB 59 #define CONFIG_RMII 60 #define CONFIG_NET_RETRY_COUNT 20 61 #define CONFIG_RESET_PHY_R 62 #define CONFIG_TFTP_PORT 63 #define CONFIG_TFTP_TSIZE 64 65 /* USB */ 66 #define CONFIG_USB_ATMEL 67 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 68 #define CONFIG_USB_OHCI_NEW 69 #define CONFIG_DOS_PARTITION 70 #define CONFIG_SYS_USB_OHCI_CPU_INIT 71 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE 72 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 73 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 74 #define CONFIG_USB_STORAGE 75 76 /* GPIOs and IO expander */ 77 #define CONFIG_AT91_LEGACY 78 #define CONFIG_ATMEL_LEGACY 79 #define CONFIG_AT91_GPIO 80 #define CONFIG_AT91_GPIO_PULLUP 1 81 #define CONFIG_PCA953X 82 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x28 83 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} } 84 85 /* UARTs/Serial console */ 86 #define CONFIG_ATMEL_USART 87 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 88 #define CONFIG_USART_ID ATMEL_ID_SYS 89 #define CONFIG_BAUDRATE 115200 90 #define CONFIG_SYS_PROMPT "Snapper> " 91 92 /* I2C - Bit-bashed */ 93 #define CONFIG_SYS_I2C 94 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 95 #define CONFIG_SYS_I2C_SOFT_SPEED 100000 96 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F 97 #define CONFIG_SOFT_I2C_READ_REPEATED_START 98 #define I2C_INIT do { \ 99 at91_set_gpio_output(AT91_PIN_PA23, 1); \ 100 at91_set_gpio_output(AT91_PIN_PA24, 1); \ 101 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \ 102 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \ 103 } while (0) 104 #define I2C_SOFT_DECLARATIONS 105 #define I2C_ACTIVE 106 #define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1); 107 #define I2C_READ at91_get_gpio_value(AT91_PIN_PA23); 108 #define I2C_SDA(bit) do { \ 109 if (bit) { \ 110 at91_set_gpio_input(AT91_PIN_PA23, 1); \ 111 } else { \ 112 at91_set_gpio_output(AT91_PIN_PA23, 1); \ 113 at91_set_gpio_value(AT91_PIN_PA23, bit); \ 114 } \ 115 } while (0) 116 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit) 117 #define I2C_DELAY udelay(2) 118 119 /* Boot options */ 120 #define CONFIG_SYS_LOAD_ADDR 0x23000000 121 #define CONFIG_BOOTDELAY 3 122 #define CONFIG_ZERO_BOOTDELAY_CHECK 123 124 #define CONFIG_BOOTP_BOOTFILESIZE 125 #define CONFIG_BOOTP_BOOTPATH 126 #define CONFIG_BOOTP_GATEWAY 127 #define CONFIG_BOOTP_HOSTNAME 128 129 /* Environment settings */ 130 #define CONFIG_ENV_IS_IN_NAND 131 #define CONFIG_ENV_OFFSET (512 << 10) 132 #define CONFIG_ENV_SIZE (256 << 10) 133 #define CONFIG_ENV_OVERWRITE 134 #define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any" 135 136 /* Console settings */ 137 #define CONFIG_SYS_CBSIZE 256 138 #define CONFIG_SYS_MAXARGS 16 139 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 140 sizeof(CONFIG_SYS_PROMPT) + 16) 141 #define CONFIG_SYS_LONGHELP 142 #define CONFIG_CMDLINE_EDITING 143 #define CONFIG_AUTO_COMPLETE 144 #define CONFIG_SYS_HUSH_PARSER 145 146 /* U-Boot memory settings */ 147 #define CONFIG_SYS_MALLOC_LEN (1 << 20) 148 149 /* Command line configuration */ 150 #include <config_cmd_default.h> 151 #undef CONFIG_CMD_BDI 152 #undef CONFIG_CMD_FPGA 153 #undef CONFIG_CMD_IMI 154 #undef CONFIG_CMD_IMLS 155 #undef CONFIG_CMD_LOADS 156 #undef CONFIG_CMD_SOURCE 157 158 #define CONFIG_CMD_PING 159 #define CONFIG_CMD_DHCP 160 #define CONFIG_CMD_FAT 161 #define CONFIG_CMD_I2C 162 #undef CONFIG_CMD_GPIO 163 #define CONFIG_CMD_USB 164 #define CONFIG_CMD_MII 165 #define CONFIG_CMD_NAND 166 #define CONFIG_CMD_PCA953X 167 #define CONFIG_CMD_PCA953X_INFO 168 169 #endif /* __CONFIG_H */ 170