1b8d41ddaSRyan Mallon /*
2b8d41ddaSRyan Mallon  * Bluewater Systems Snapper 9260 and 9G20 modules
3b8d41ddaSRyan Mallon  *
4b8d41ddaSRyan Mallon  * (C) Copyright 2011 Bluewater Systems
5b8d41ddaSRyan Mallon  *   Author: Andre Renaud <andre@bluewatersys.com>
6b8d41ddaSRyan Mallon  *   Author: Ryan Mallon <ryan@bluewatersys.com>
7b8d41ddaSRyan Mallon  *
81a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
9b8d41ddaSRyan Mallon  */
10b8d41ddaSRyan Mallon 
11b8d41ddaSRyan Mallon #ifndef __CONFIG_H
12b8d41ddaSRyan Mallon #define __CONFIG_H
13b8d41ddaSRyan Mallon 
14b8d41ddaSRyan Mallon /* SoC type is defined in boards.cfg */
15b8d41ddaSRyan Mallon #include <asm/hardware.h>
161ace4022SAlexey Brodkin #include <linux/sizes.h>
17b8d41ddaSRyan Mallon 
185e8a749cSSimon Glass #define CONFIG_SYS_TEXT_BASE		0x21f00000
19b8d41ddaSRyan Mallon 
20b8d41ddaSRyan Mallon /* ARM asynchronous clock */
21b8d41ddaSRyan Mallon #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000 /* External Crystal, in Hz */
22b8d41ddaSRyan Mallon #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
23cd052cd9SSimon Glass #define CONFIG_SYS_GENERIC_BOARD
24*1a1927f3SSimon Glass #define CONFIG_DM
25*1a1927f3SSimon Glass #define CONFIG_CMD_DM
26*1a1927f3SSimon Glass #define CONFIG_DM_GPIO
27*1a1927f3SSimon Glass #define CONFIG_DM_SERIAL
28*1a1927f3SSimon Glass #define CONFIG_SYS_MALLOC_F_LEN		(1 << 10)
29b8d41ddaSRyan Mallon 
30b8d41ddaSRyan Mallon /* CPU */
31b8d41ddaSRyan Mallon #define CONFIG_ARCH_CPU_INIT
32b8d41ddaSRyan Mallon 
33b8d41ddaSRyan Mallon #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
34b8d41ddaSRyan Mallon #define CONFIG_SETUP_MEMORY_TAGS
35b8d41ddaSRyan Mallon #define CONFIG_INITRD_TAG
36b8d41ddaSRyan Mallon #define CONFIG_SKIP_LOWLEVEL_INIT
37b8d41ddaSRyan Mallon #define CONFIG_SKIP_RELOCATE_UBOOT
38b8d41ddaSRyan Mallon #define CONFIG_DISPLAY_CPUINFO
39b8d41ddaSRyan Mallon #define CONFIG_FIT
40b8d41ddaSRyan Mallon 
41b8d41ddaSRyan Mallon /* SDRAM */
42b8d41ddaSRyan Mallon #define CONFIG_NR_DRAM_BANKS		1
43b8d41ddaSRyan Mallon #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
44b8d41ddaSRyan Mallon #define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024) /* 64MB */
45b8d41ddaSRyan Mallon #define CONFIG_SYS_INIT_SP_ADDR		(ATMEL_BASE_SRAM1 + 0x1000 - \
46b8d41ddaSRyan Mallon 					 GENERATED_GBL_DATA_SIZE)
47b8d41ddaSRyan Mallon 
48b8d41ddaSRyan Mallon /* Mem test settings */
49b8d41ddaSRyan Mallon #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
50b8d41ddaSRyan Mallon #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
51b8d41ddaSRyan Mallon 
52b8d41ddaSRyan Mallon /* NAND Flash */
53b8d41ddaSRyan Mallon #define CONFIG_NAND_ATMEL
54b8d41ddaSRyan Mallon #define CONFIG_SYS_NO_FLASH
55b8d41ddaSRyan Mallon #define CONFIG_SYS_MAX_NAND_DEVICE	1
56b8d41ddaSRyan Mallon #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
57b8d41ddaSRyan Mallon #define CONFIG_SYS_NAND_DBW_8
58b8d41ddaSRyan Mallon #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21) /* AD21 */
59b8d41ddaSRyan Mallon #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22) /* AD22 */
60b8d41ddaSRyan Mallon #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
61b8d41ddaSRyan Mallon #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
62b8d41ddaSRyan Mallon 
63b8d41ddaSRyan Mallon /* Ethernet */
64b8d41ddaSRyan Mallon #define CONFIG_MACB
65b8d41ddaSRyan Mallon #define CONFIG_RMII
66b8d41ddaSRyan Mallon #define CONFIG_NET_RETRY_COUNT		20
67b8d41ddaSRyan Mallon #define CONFIG_RESET_PHY_R
684535a24cSHeiko Schocher #define CONFIG_AT91_WANTS_COMMON_PHY
69b8d41ddaSRyan Mallon #define CONFIG_TFTP_PORT
70b8d41ddaSRyan Mallon #define CONFIG_TFTP_TSIZE
71b8d41ddaSRyan Mallon 
72b8d41ddaSRyan Mallon /* USB */
73b8d41ddaSRyan Mallon #define CONFIG_USB_ATMEL
74dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
75b8d41ddaSRyan Mallon #define CONFIG_USB_OHCI_NEW
76b8d41ddaSRyan Mallon #define CONFIG_DOS_PARTITION
77b8d41ddaSRyan Mallon #define CONFIG_SYS_USB_OHCI_CPU_INIT
78b8d41ddaSRyan Mallon #define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_UHP_BASE
79b8d41ddaSRyan Mallon #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9260"
80b8d41ddaSRyan Mallon #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
81b8d41ddaSRyan Mallon #define CONFIG_USB_STORAGE
82b8d41ddaSRyan Mallon 
83b8d41ddaSRyan Mallon /* GPIOs and IO expander */
84b8d41ddaSRyan Mallon #define CONFIG_ATMEL_LEGACY
85b8d41ddaSRyan Mallon #define CONFIG_AT91_GPIO
86b8d41ddaSRyan Mallon #define CONFIG_AT91_GPIO_PULLUP		1
87b8d41ddaSRyan Mallon #define CONFIG_PCA953X
88b8d41ddaSRyan Mallon #define CONFIG_SYS_I2C_PCA953X_ADDR	0x28
89b8d41ddaSRyan Mallon #define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x28, 16} }
90b8d41ddaSRyan Mallon 
91b8d41ddaSRyan Mallon /* UARTs/Serial console */
92b8d41ddaSRyan Mallon #define CONFIG_ATMEL_USART
93*1a1927f3SSimon Glass #ifndef CONFIG_DM_SERIAL
94b8d41ddaSRyan Mallon #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
95b8d41ddaSRyan Mallon #define CONFIG_USART_ID			ATMEL_ID_SYS
96*1a1927f3SSimon Glass #endif
97b8d41ddaSRyan Mallon #define CONFIG_BAUDRATE			115200
98b8d41ddaSRyan Mallon #define CONFIG_SYS_PROMPT		"Snapper> "
99b8d41ddaSRyan Mallon 
100b8d41ddaSRyan Mallon /* I2C - Bit-bashed */
101ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C
102ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
103ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_SOFT_SPEED	100000
104ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_SOFT_SLAVE	0x7F
105b8d41ddaSRyan Mallon #define CONFIG_SOFT_I2C_READ_REPEATED_START
106b8d41ddaSRyan Mallon #define I2C_INIT do {							\
107b8d41ddaSRyan Mallon 		at91_set_gpio_output(AT91_PIN_PA23, 1);			\
108b8d41ddaSRyan Mallon 		at91_set_gpio_output(AT91_PIN_PA24, 1);			\
109b8d41ddaSRyan Mallon 		at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1);	\
110b8d41ddaSRyan Mallon 		at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1);	\
111b8d41ddaSRyan Mallon 	} while (0)
112b8d41ddaSRyan Mallon #define I2C_SOFT_DECLARATIONS
113b8d41ddaSRyan Mallon #define I2C_ACTIVE
114b8d41ddaSRyan Mallon #define I2C_TRISTATE	at91_set_gpio_input(AT91_PIN_PA23, 1);
115b8d41ddaSRyan Mallon #define I2C_READ	at91_get_gpio_value(AT91_PIN_PA23);
116b8d41ddaSRyan Mallon #define I2C_SDA(bit) do {						\
117b8d41ddaSRyan Mallon 		if (bit) {						\
118b8d41ddaSRyan Mallon 			at91_set_gpio_input(AT91_PIN_PA23, 1);		\
119b8d41ddaSRyan Mallon 		} else {						\
120b8d41ddaSRyan Mallon 			at91_set_gpio_output(AT91_PIN_PA23, 1);		\
121b8d41ddaSRyan Mallon 			at91_set_gpio_value(AT91_PIN_PA23, bit);	\
122b8d41ddaSRyan Mallon 		}							\
123b8d41ddaSRyan Mallon 	} while (0)
124b8d41ddaSRyan Mallon #define I2C_SCL(bit)	at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
125b8d41ddaSRyan Mallon #define I2C_DELAY	udelay(2)
126b8d41ddaSRyan Mallon 
127b8d41ddaSRyan Mallon /* Boot options */
128b8d41ddaSRyan Mallon #define CONFIG_SYS_LOAD_ADDR		0x23000000
129b8d41ddaSRyan Mallon #define CONFIG_BOOTDELAY		3
130b8d41ddaSRyan Mallon #define CONFIG_ZERO_BOOTDELAY_CHECK
131b8d41ddaSRyan Mallon 
132b8d41ddaSRyan Mallon #define CONFIG_BOOTP_BOOTFILESIZE
133b8d41ddaSRyan Mallon #define CONFIG_BOOTP_BOOTPATH
134b8d41ddaSRyan Mallon #define CONFIG_BOOTP_GATEWAY
135b8d41ddaSRyan Mallon #define CONFIG_BOOTP_HOSTNAME
136b8d41ddaSRyan Mallon 
137b8d41ddaSRyan Mallon /* Environment settings */
138b8d41ddaSRyan Mallon #define CONFIG_ENV_IS_IN_NAND
139b8d41ddaSRyan Mallon #define CONFIG_ENV_OFFSET		(512 << 10)
140b8d41ddaSRyan Mallon #define CONFIG_ENV_SIZE			(256 << 10)
141b8d41ddaSRyan Mallon #define CONFIG_ENV_OVERWRITE
142b8d41ddaSRyan Mallon #define CONFIG_BOOTARGS			"console=ttyS0,115200 ip=any"
143b8d41ddaSRyan Mallon 
144b8d41ddaSRyan Mallon /* Console settings */
145b8d41ddaSRyan Mallon #define CONFIG_SYS_CBSIZE		256
146b8d41ddaSRyan Mallon #define CONFIG_SYS_MAXARGS		16
147b8d41ddaSRyan Mallon #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE +		\
148b8d41ddaSRyan Mallon 					 sizeof(CONFIG_SYS_PROMPT) + 16)
149b8d41ddaSRyan Mallon #define CONFIG_SYS_LONGHELP
150b8d41ddaSRyan Mallon #define CONFIG_CMDLINE_EDITING
151b8d41ddaSRyan Mallon #define CONFIG_AUTO_COMPLETE
152b8d41ddaSRyan Mallon #define CONFIG_SYS_HUSH_PARSER
153b8d41ddaSRyan Mallon 
154b8d41ddaSRyan Mallon /* U-Boot memory settings */
155b8d41ddaSRyan Mallon #define CONFIG_SYS_MALLOC_LEN		(1 << 20)
156b8d41ddaSRyan Mallon 
157b8d41ddaSRyan Mallon /* Command line configuration */
158b8d41ddaSRyan Mallon #include <config_cmd_default.h>
159b8d41ddaSRyan Mallon #undef CONFIG_CMD_BDI
160b8d41ddaSRyan Mallon #undef CONFIG_CMD_FPGA
161b8d41ddaSRyan Mallon #undef CONFIG_CMD_IMI
162b8d41ddaSRyan Mallon #undef CONFIG_CMD_IMLS
163b8d41ddaSRyan Mallon #undef CONFIG_CMD_LOADS
164b8d41ddaSRyan Mallon #undef CONFIG_CMD_SOURCE
165b8d41ddaSRyan Mallon 
166b8d41ddaSRyan Mallon #define CONFIG_CMD_PING
167b8d41ddaSRyan Mallon #define CONFIG_CMD_DHCP
168b8d41ddaSRyan Mallon #define CONFIG_CMD_FAT
169b8d41ddaSRyan Mallon #define CONFIG_CMD_I2C
170*1a1927f3SSimon Glass #define CONFIG_CMD_GPIO
171b8d41ddaSRyan Mallon #define CONFIG_CMD_USB
172b8d41ddaSRyan Mallon #define CONFIG_CMD_MII
173b8d41ddaSRyan Mallon #define CONFIG_CMD_NAND
174b8d41ddaSRyan Mallon #define CONFIG_CMD_PCA953X
175b8d41ddaSRyan Mallon #define CONFIG_CMD_PCA953X_INFO
176b8d41ddaSRyan Mallon 
177b8d41ddaSRyan Mallon #endif /* __CONFIG_H */
178