1 /* 2 * Copyright (C) 2011 Samsung Electronics 3 * 4 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board. 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #ifndef __CONFIG_H 26 #define __CONFIG_H 27 28 /* High Level Configuration Options */ 29 #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ 30 #define CONFIG_S5P 1 /* S5P Family */ 31 #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ 32 #define CONFIG_SMDKV310 1 /* working with SMDKV310*/ 33 34 #include <asm/arch/cpu.h> /* get chip and board defs */ 35 36 #define CONFIG_ARCH_CPU_INIT 37 #define CONFIG_DISPLAY_CPUINFO 38 #define CONFIG_DISPLAY_BOARDINFO 39 40 /* Mach Type */ 41 #define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310 42 43 /* Keep L2 Cache Disabled */ 44 #define CONFIG_L2_OFF 1 45 46 #define CONFIG_SYS_SDRAM_BASE 0x40000000 47 #define CONFIG_SYS_TEXT_BASE 0x43E00000 48 49 /* input clock of PLL: SMDKV310 has 24MHz input clock */ 50 #define CONFIG_SYS_CLK_FREQ 24000000 51 52 #define CONFIG_SETUP_MEMORY_TAGS 53 #define CONFIG_CMDLINE_TAG 54 #define CONFIG_INITRD_TAG 55 #define CONFIG_CMDLINE_EDITING 56 57 /* Handling Sleep Mode*/ 58 #define S5P_CHECK_SLEEP 0x00000BAD 59 #define S5P_CHECK_DIDLE 0xBAD00000 60 61 /* Size of malloc() pool */ 62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) 63 64 /* select serial console configuration */ 65 #define CONFIG_SERIAL_MULTI 1 66 #define CONFIG_SERIAL1 1 /* use SERIAL 1 */ 67 #define CONFIG_BAUDRATE 115200 68 #define EXYNOS4_DEFAULT_UART_OFFSET 0x010000 69 70 /* SD/MMC configuration */ 71 #define CONFIG_GENERIC_MMC 1 72 #define CONFIG_MMC 1 73 #define CONFIG_S5P_MMC 1 74 75 /* PWM */ 76 #define CONFIG_PWM 1 77 78 /* allow to overwrite serial and ethaddr */ 79 #define CONFIG_ENV_OVERWRITE 80 81 /* Command definition*/ 82 #include <config_cmd_default.h> 83 84 #define CONFIG_CMD_PING 85 #define CONFIG_CMD_ELF 86 #define CONFIG_CMD_DHCP 87 #define CONFIG_CMD_MMC 88 #define CONFIG_CMD_NET 89 #define CONFIG_CMD_FAT 90 91 #define CONFIG_BOOTDELAY 3 92 #define CONFIG_ZERO_BOOTDELAY_CHECK 93 94 /* MMC SPL */ 95 #define CONFIG_SPL 96 #define COPY_BL2_FNPTR_ADDR 0x00002488 97 98 #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" 99 100 /* Miscellaneous configurable options */ 101 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 102 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 103 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 104 #define CONFIG_SYS_PROMPT "SMDKV310 # " 105 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/ 106 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 107 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 108 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 109 /* Boot Argument Buffer Size */ 110 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 111 /* memtest works on */ 112 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 113 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) 114 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) 115 116 #define CONFIG_SYS_HZ 1000 117 118 /* valid baudrates */ 119 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 120 121 /* Stack sizes */ 122 #define CONFIG_STACKSIZE (256 << 10) /* 256KB */ 123 124 /* SMDKV310 has 4 bank of DRAM */ 125 #define CONFIG_NR_DRAM_BANKS 4 126 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ 127 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 128 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE 129 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) 130 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE 131 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) 132 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE 133 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) 134 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE 135 136 /* FLASH and environment organization */ 137 #define CONFIG_SYS_NO_FLASH 1 138 #undef CONFIG_CMD_IMLS 139 #define CONFIG_IDENT_STRING " for SMDKC210/V310" 140 141 #ifdef CONFIG_USE_IRQ 142 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 143 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 144 #endif 145 146 #define CONFIG_CLK_1000_400_200 147 148 /* MIU (Memory Interleaving Unit) */ 149 #define CONFIG_MIU_2BIT_INTERLEAVED 150 151 #define CONFIG_ENV_IS_IN_MMC 1 152 #define CONFIG_SYS_MMC_ENV_DEV 0 153 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ 154 #define RESERVE_BLOCK_SIZE (512) 155 #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ 156 #define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE) 157 #define CONFIG_DOS_PARTITION 1 158 159 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) 160 161 /* U-boot copy size from boot Media to DRAM.*/ 162 #define COPY_BL2_SIZE 0x80000 163 #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) 164 #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) 165 166 /* Ethernet Controllor Driver */ 167 #ifdef CONFIG_CMD_NET 168 #define CONFIG_SMC911X 169 #define CONFIG_SMC911X_BASE 0x5000000 170 #define CONFIG_SMC911X_16_BIT 171 #define CONFIG_ENV_SROM_BANK 1 172 #endif /*CONFIG_CMD_NET*/ 173 174 /* Enable devicetree support */ 175 #define CONFIG_OF_LIBFDT 176 #endif /* __CONFIG_H */ 177