xref: /openbmc/u-boot/include/configs/smdkv310.h (revision 20b9f2ea)
1 /*
2  * Copyright (C) 2011 Samsung Electronics
3  *
4  * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include "exynos4-common.h"
13 
14 #undef CONFIG_BOARD_COMMON
15 #undef CONFIG_USB_GADGET_DWC2_OTG_PHY
16 #undef CONFIG_REVISION_TAG
17 
18 /* High Level Configuration Options */
19 #define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
20 #define CONFIG_SMDKV310			1	/* working with SMDKV310*/
21 
22 /* Mach Type */
23 #define CONFIG_MACH_TYPE		MACH_TYPE_SMDKV310
24 
25 #define CONFIG_SYS_SDRAM_BASE		0x40000000
26 #define CONFIG_SYS_TEXT_BASE		0x43E00000
27 
28 /* Handling Sleep Mode*/
29 #define S5P_CHECK_SLEEP			0x00000BAD
30 #define S5P_CHECK_DIDLE			0xBAD00000
31 #define S5P_CHECK_LPA			0xABAD0000
32 
33 /* select serial console configuration */
34 #define CONFIG_SERIAL1			1	/* use SERIAL 1 */
35 #define EXYNOS4_DEFAULT_UART_OFFSET	0x010000
36 
37 /* allow to overwrite serial and ethaddr */
38 #define CONFIG_ENV_OVERWRITE
39 
40 /* MMC SPL */
41 #define CONFIG_SKIP_LOWLEVEL_INIT
42 #define COPY_BL2_FNPTR_ADDR	0x00002488
43 
44 #define CONFIG_SPL_TEXT_BASE	0x02021410
45 
46 #define CONFIG_BOOTCOMMAND	"fatload mmc 0 40007000 uImage; bootm 40007000"
47 
48 /* Miscellaneous configurable options */
49 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
50 /* memtest works on */
51 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
52 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
53 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
54 
55 /* SMDKV310 has 4 bank of DRAM */
56 #define CONFIG_NR_DRAM_BANKS	4
57 #define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */
58 #define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
59 #define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
60 #define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
61 #define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
62 #define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
63 #define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
64 #define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
65 #define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
66 
67 /* FLASH and environment organization */
68 
69 #define CONFIG_CLK_1000_400_200
70 
71 /* MIU (Memory Interleaving Unit) */
72 #define CONFIG_MIU_2BIT_INTERLEAVED
73 
74 #define CONFIG_SYS_MMC_ENV_DEV		0
75 #define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KB */
76 #define RESERVE_BLOCK_SIZE		(512)
77 #define BL1_SIZE			(16 << 10) /*16 K reserved for BL1*/
78 #define CONFIG_ENV_OFFSET		(RESERVE_BLOCK_SIZE + BL1_SIZE)
79 
80 #define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
81 
82 #define CONFIG_SYS_INIT_SP_ADDR		0x02040000
83 
84 /* U-Boot copy size from boot Media to DRAM.*/
85 #define	COPY_BL2_SIZE		0x80000
86 #define BL2_START_OFFSET	((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
87 #define BL2_SIZE_BLOC_COUNT	(COPY_BL2_SIZE/512)
88 
89 /* Ethernet Controllor Driver */
90 #ifdef CONFIG_CMD_NET
91 #define CONFIG_ENV_SROM_BANK		1
92 #endif /*CONFIG_CMD_NET*/
93 
94 #endif	/* __CONFIG_H */
95