1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2007-2008 4 * Stelian Pop <stelian@popies.net> 5 * Lead Tech Design <www.leadtechdesign.com> 6 * 7 * (C) Copyright 2010 8 * Achim Ehrlich <aehrlich@taskit.de> 9 * taskit GmbH <www.taskit.de> 10 * 11 * (C) Copyright 2012 12 * Markus Hubig <mhubig@imko.de> 13 * IMKO GmbH <www.imko.de> 14 * 15 * (C) Copyright 2014 16 * Heiko Schocher <hs@denx.de> 17 * DENX Software Engineering GmbH 18 * 19 * Configuation settings for the smartweb. 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 /* 26 * SoC must be defined first, before hardware.h is included. 27 * In this case SoC is defined in boards.cfg. 28 */ 29 #include <asm/hardware.h> 30 #include <linux/sizes.h> 31 32 /* 33 * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot 34 * program. Since the linker has to swallow that define, we must use a pure 35 * hex number here! 36 */ 37 38 /* ARM asynchronous clock */ 39 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 40 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */ 41 42 /* misc settings */ 43 #define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */ 44 #define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */ 45 #define CONFIG_INITRD_TAG /* pass initrd param to kernel */ 46 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */ 47 48 /* We set the max number of command args high to avoid HUSH bugs. */ 49 #define CONFIG_SYS_MAXARGS 32 50 51 /* setting board specific options */ 52 #define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB 53 #define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */ 54 #define CONFIG_SYS_AUTOLOAD "yes" 55 #define CONFIG_RESET_TO_RETRY 56 57 /* The LED PINs */ 58 #define CONFIG_RED_LED AT91_PIN_PA9 59 #define CONFIG_GREEN_LED AT91_PIN_PA6 60 61 /* 62 * SDRAM: 1 bank, 64 MB, base address 0x20000000 63 * Already initialized before u-boot gets started. 64 */ 65 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 66 #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M) 67 68 /* 69 * Perform a SDRAM Memtest from the start of SDRAM 70 * till the beginning of the U-Boot position in RAM. 71 */ 72 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 73 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 74 75 /* Size of malloc() pool */ 76 #define CONFIG_SYS_MALLOC_LEN \ 77 ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000) 78 79 /* NAND flash settings */ 80 #define CONFIG_SYS_MAX_NAND_DEVICE 1 81 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 82 #define CONFIG_SYS_NAND_DBW_8 83 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 84 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 85 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 86 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 87 88 /* general purpose I/O */ 89 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 90 #define CONFIG_AT91_GPIO /* enable the GPIO features */ 91 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 92 93 /* serial console */ 94 #define CONFIG_ATMEL_USART 95 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 96 #define CONFIG_USART_ID ATMEL_ID_SYS 97 98 /* 99 * Ethernet configuration 100 * 101 */ 102 #define CONFIG_MACB 103 #define CONFIG_RMII /* use reduced MII inteface */ 104 #define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */ 105 #define CONFIG_AT91_WANTS_COMMON_PHY 106 107 /* BOOTP and DHCP options */ 108 #define CONFIG_BOOTP_BOOTFILESIZE 109 #define CONFIG_NFSBOOTCOMMAND \ 110 "setenv autoload yes; setenv autoboot yes; " \ 111 "setenv bootargs ${basicargs} ${mtdparts} " \ 112 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \ 113 "dhcp" 114 115 #if !defined(CONFIG_SPL_BUILD) 116 /* USB configuration */ 117 #define CONFIG_USB_ATMEL 118 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 119 #define CONFIG_USB_OHCI_NEW 120 #define CONFIG_SYS_USB_OHCI_CPU_INIT 121 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE 122 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 123 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 124 125 /* USB DFU support */ 126 127 #define CONFIG_USB_GADGET_AT91 128 129 /* DFU class support */ 130 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M 131 #define DFU_MANIFEST_POLL_TIMEOUT 25000 132 #endif 133 134 /* General Boot Parameter */ 135 #define CONFIG_BOOTCOMMAND "run flashboot" 136 #define CONFIG_SYS_CBSIZE 512 137 138 /* 139 * RAM Memory address where to put the 140 * Linux Kernel befor starting. 141 */ 142 #define CONFIG_SYS_LOAD_ADDR 0x22000000 143 144 /* 145 * The NAND Flash partitions: 146 */ 147 #define CONFIG_ENV_OFFSET (0x100000) 148 #define CONFIG_ENV_OFFSET_REDUND (0x180000) 149 #define CONFIG_ENV_RANGE (SZ_512K) 150 #define CONFIG_ENV_SIZE (SZ_128K) 151 152 /* 153 * Predefined environment variables. 154 * Usefull to define some easy to use boot commands. 155 */ 156 #define CONFIG_EXTRA_ENV_SETTINGS \ 157 \ 158 "basicargs=console=ttyS0,115200\0" \ 159 \ 160 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" 161 162 #ifdef CONFIG_SPL_BUILD 163 #define CONFIG_SYS_INIT_SP_ADDR 0x301000 164 #define CONFIG_SPL_STACK_R 165 #define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE 166 #else 167 /* 168 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 169 * leaving the correct space for initial global data structure above that 170 * address while providing maximum stack area below. 171 */ 172 #define CONFIG_SYS_INIT_SP_ADDR \ 173 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 174 #endif 175 176 /* Defines for SPL */ 177 #define CONFIG_SPL_TEXT_BASE 0x0 178 #define CONFIG_SPL_MAX_SIZE (SZ_4K) 179 180 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE 181 #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K) 182 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ 183 CONFIG_SPL_BSS_MAX_SIZE) 184 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 185 186 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 187 #define CONFIG_SYS_USE_NANDFLASH 1 188 #define CONFIG_SPL_NAND_DRIVERS 189 #define CONFIG_SPL_NAND_BASE 190 #define CONFIG_SPL_NAND_ECC 191 #define CONFIG_SPL_NAND_RAW_ONLY 192 #define CONFIG_SPL_NAND_SOFTECC 193 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 194 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K 195 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 196 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 197 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 198 199 #define CONFIG_SYS_NAND_SIZE (SZ_256M) 200 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 201 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 202 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 203 CONFIG_SYS_NAND_PAGE_SIZE) 204 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 205 #define CONFIG_SYS_NAND_ECCSIZE 256 206 #define CONFIG_SYS_NAND_ECCBYTES 3 207 #define CONFIG_SYS_NAND_OOBSIZE 64 208 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 209 48, 49, 50, 51, 52, 53, 54, 55, \ 210 56, 57, 58, 59, 60, 61, 62, 63, } 211 212 #define CONFIG_SPL_ATMEL_SIZE 213 #define CONFIG_SYS_MASTER_CLOCK (198656000/2) 214 #define AT91_PLL_LOCK_TIMEOUT 1000000 215 #define CONFIG_SYS_AT91_PLLA 0x2060bf09 216 #define CONFIG_SYS_MCKR 0x100 217 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 218 #define CONFIG_SYS_AT91_PLLB 0x10483f0e 219 220 #if defined(CONFIG_SPL_BUILD) 221 #define CONFIG_SYS_ICACHE_OFF 222 #define CONFIG_SYS_DCACHE_OFF 223 #endif 224 #endif /* __CONFIG_H */ 225