1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2007-2008 4 * Stelian Pop <stelian@popies.net> 5 * Lead Tech Design <www.leadtechdesign.com> 6 * 7 * (C) Copyright 2010 8 * Achim Ehrlich <aehrlich@taskit.de> 9 * taskit GmbH <www.taskit.de> 10 * 11 * (C) Copyright 2012 12 * Markus Hubig <mhubig@imko.de> 13 * IMKO GmbH <www.imko.de> 14 * 15 * (C) Copyright 2014 16 * Heiko Schocher <hs@denx.de> 17 * DENX Software Engineering GmbH 18 * 19 * Configuation settings for the smartweb. 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 /* 26 * SoC must be defined first, before hardware.h is included. 27 * In this case SoC is defined in boards.cfg. 28 */ 29 #include <asm/hardware.h> 30 #include <linux/sizes.h> 31 32 /* 33 * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot 34 * program. Since the linker has to swallow that define, we must use a pure 35 * hex number here! 36 */ 37 38 /* ARM asynchronous clock */ 39 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 40 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */ 41 42 /* misc settings */ 43 #define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */ 44 #define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */ 45 #define CONFIG_INITRD_TAG /* pass initrd param to kernel */ 46 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */ 47 48 /* We set the max number of command args high to avoid HUSH bugs. */ 49 #define CONFIG_SYS_MAXARGS 32 50 51 /* setting board specific options */ 52 #define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB 53 #define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */ 54 #define CONFIG_SYS_AUTOLOAD "yes" 55 #define CONFIG_RESET_TO_RETRY 56 57 /* The LED PINs */ 58 #define CONFIG_RED_LED AT91_PIN_PA9 59 #define CONFIG_GREEN_LED AT91_PIN_PA6 60 61 /* 62 * SDRAM: 1 bank, 64 MB, base address 0x20000000 63 * Already initialized before u-boot gets started. 64 */ 65 #define CONFIG_NR_DRAM_BANKS 1 66 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 67 #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M) 68 69 /* 70 * Perform a SDRAM Memtest from the start of SDRAM 71 * till the beginning of the U-Boot position in RAM. 72 */ 73 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 74 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 75 76 /* Size of malloc() pool */ 77 #define CONFIG_SYS_MALLOC_LEN \ 78 ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000) 79 80 /* NAND flash settings */ 81 #define CONFIG_SYS_MAX_NAND_DEVICE 1 82 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 83 #define CONFIG_SYS_NAND_DBW_8 84 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 85 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 86 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 87 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 88 89 /* general purpose I/O */ 90 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 91 #define CONFIG_AT91_GPIO /* enable the GPIO features */ 92 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 93 94 /* serial console */ 95 #define CONFIG_ATMEL_USART 96 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 97 #define CONFIG_USART_ID ATMEL_ID_SYS 98 99 /* 100 * Ethernet configuration 101 * 102 */ 103 #define CONFIG_MACB 104 #define CONFIG_RMII /* use reduced MII inteface */ 105 #define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */ 106 #define CONFIG_AT91_WANTS_COMMON_PHY 107 108 /* BOOTP and DHCP options */ 109 #define CONFIG_BOOTP_BOOTFILESIZE 110 #define CONFIG_NFSBOOTCOMMAND \ 111 "setenv autoload yes; setenv autoboot yes; " \ 112 "setenv bootargs ${basicargs} ${mtdparts} " \ 113 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \ 114 "dhcp" 115 116 /* Enable the watchdog */ 117 #define CONFIG_AT91SAM9_WATCHDOG 118 #if !defined(CONFIG_SPL_BUILD) 119 #define CONFIG_HW_WATCHDOG 120 #endif 121 #define CONFIG_AT91_HW_WDT_TIMEOUT 15 122 123 #if !defined(CONFIG_SPL_BUILD) 124 /* USB configuration */ 125 #define CONFIG_USB_ATMEL 126 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 127 #define CONFIG_USB_OHCI_NEW 128 #define CONFIG_SYS_USB_OHCI_CPU_INIT 129 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE 130 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 131 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 132 133 /* USB DFU support */ 134 135 #define CONFIG_USB_GADGET_AT91 136 137 /* DFU class support */ 138 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M 139 #define DFU_MANIFEST_POLL_TIMEOUT 25000 140 #endif 141 142 /* General Boot Parameter */ 143 #define CONFIG_BOOTCOMMAND "run flashboot" 144 #define CONFIG_SYS_CBSIZE 512 145 146 /* 147 * RAM Memory address where to put the 148 * Linux Kernel befor starting. 149 */ 150 #define CONFIG_SYS_LOAD_ADDR 0x22000000 151 152 /* 153 * The NAND Flash partitions: 154 */ 155 #define CONFIG_ENV_OFFSET (0x100000) 156 #define CONFIG_ENV_OFFSET_REDUND (0x180000) 157 #define CONFIG_ENV_RANGE (SZ_512K) 158 #define CONFIG_ENV_SIZE (SZ_128K) 159 160 /* 161 * Predefined environment variables. 162 * Usefull to define some easy to use boot commands. 163 */ 164 #define CONFIG_EXTRA_ENV_SETTINGS \ 165 \ 166 "basicargs=console=ttyS0,115200\0" \ 167 \ 168 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" 169 170 #ifdef CONFIG_SPL_BUILD 171 #define CONFIG_SYS_INIT_SP_ADDR 0x301000 172 #define CONFIG_SPL_STACK_R 173 #define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE 174 #else 175 /* 176 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 177 * leaving the correct space for initial global data structure above that 178 * address while providing maximum stack area below. 179 */ 180 #define CONFIG_SYS_INIT_SP_ADDR \ 181 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 182 #endif 183 184 /* Defines for SPL */ 185 #define CONFIG_SPL_TEXT_BASE 0x0 186 #define CONFIG_SPL_MAX_SIZE (SZ_4K) 187 188 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE 189 #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K) 190 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ 191 CONFIG_SPL_BSS_MAX_SIZE) 192 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 193 194 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 195 #define CONFIG_SYS_USE_NANDFLASH 1 196 #define CONFIG_SPL_NAND_DRIVERS 197 #define CONFIG_SPL_NAND_BASE 198 #define CONFIG_SPL_NAND_ECC 199 #define CONFIG_SPL_NAND_RAW_ONLY 200 #define CONFIG_SPL_NAND_SOFTECC 201 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 202 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K 203 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 204 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 205 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 206 207 #define CONFIG_SYS_NAND_SIZE (SZ_256M) 208 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 209 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 210 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 211 CONFIG_SYS_NAND_PAGE_SIZE) 212 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 213 #define CONFIG_SYS_NAND_ECCSIZE 256 214 #define CONFIG_SYS_NAND_ECCBYTES 3 215 #define CONFIG_SYS_NAND_OOBSIZE 64 216 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 217 48, 49, 50, 51, 52, 53, 54, 55, \ 218 56, 57, 58, 59, 60, 61, 62, 63, } 219 220 #define CONFIG_SPL_ATMEL_SIZE 221 #define CONFIG_SYS_MASTER_CLOCK (198656000/2) 222 #define AT91_PLL_LOCK_TIMEOUT 1000000 223 #define CONFIG_SYS_AT91_PLLA 0x2060bf09 224 #define CONFIG_SYS_MCKR 0x100 225 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 226 #define CONFIG_SYS_AT91_PLLB 0x10483f0e 227 228 #if defined(CONFIG_SPL_BUILD) 229 #define CONFIG_SYS_ICACHE_OFF 230 #define CONFIG_SYS_DCACHE_OFF 231 #endif 232 #endif /* __CONFIG_H */ 233