xref: /openbmc/u-boot/include/configs/silk.h (revision cf0bcd7d)
1 /*
2  * include/configs/silk.h
3  *     This file is silk board configuration.
4  *
5  * Copyright (C) 2015 Renesas Electronics Corporation
6  * Copyright (C) 2015 Cogent Embedded, Inc.
7  *
8  * SPDX-License-Identifier: GPL-2.0
9  */
10 
11 #ifndef __SILK_H
12 #define __SILK_H
13 
14 #undef DEBUG
15 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Silk"
16 
17 #include "rcar-gen2-common.h"
18 
19 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
20 #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
21 #else
22 #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
23 #endif
24 #define STACK_AREA_SIZE			0xC000
25 #define LOW_LEVEL_MERAM_STACK \
26 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
27 
28 /* MEMORY */
29 #define RCAR_GEN2_SDRAM_BASE		0x40000000
30 #define RCAR_GEN2_SDRAM_SIZE		(1024u * 1024 * 1024)
31 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
32 
33 /* SCIF */
34 
35 /* FLASH */
36 #define CONFIG_SPI
37 #define CONFIG_SPI_FLASH_QUAD
38 
39 /* SH Ether */
40 #define CONFIG_SH_ETHER_USE_PORT	0
41 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
42 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
43 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
44 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
45 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
46 #define CONFIG_BITBANGMII
47 #define CONFIG_BITBANGMII_MULTI
48 
49 /* Board Clock */
50 #define RMOBILE_XTAL_CLK	20000000u
51 #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
52 #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
53 #define CONFIG_PLL1_CLK_FREQ	(CONFIG_SYS_CLK_FREQ * 156 / 2)
54 #define CONFIG_P_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 24)
55 
56 #define CONFIG_SYS_TMU_CLK_DIV  4
57 
58 /* i2c */
59 #define CONFIG_SYS_I2C
60 #define CONFIG_SYS_I2C_SH
61 #define CONFIG_SYS_I2C_SLAVE		0x7F
62 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
63 #define CONFIG_SYS_I2C_SH_SPEED0	400000
64 #define CONFIG_SYS_I2C_SH_SPEED1	400000
65 #define CONFIG_SYS_I2C_SH_SPEED2	400000
66 #define CONFIG_SH_I2C_DATA_HIGH		4
67 #define CONFIG_SH_I2C_DATA_LOW		5
68 #define CONFIG_SH_I2C_CLOCK		10000000
69 
70 #define CONFIG_SYS_I2C_POWERIC_ADDR	0x58 /* da9063 */
71 
72 /* USB */
73 #define CONFIG_USB_EHCI_RMOBILE
74 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
75 
76 /* MMCIF */
77 #define CONFIG_SH_MMCIF
78 #define CONFIG_SH_MMCIF_ADDR	0xee200000
79 #define CONFIG_SH_MMCIF_CLK	48000000
80 
81 /* SDHI */
82 #define CONFIG_SH_SDHI_FREQ	97500000
83 
84 /* Module stop status bits */
85 /* INTC-RT */
86 #define CONFIG_SMSTP0_ENA	0x00400000
87 /* MSIF */
88 #define CONFIG_SMSTP2_ENA	0x00002000
89 /* INTC-SYS, IRQC */
90 #define CONFIG_SMSTP4_ENA	0x00000180
91 /* SCIF2 */
92 #define CONFIG_SMSTP7_ENA	0x00080000
93 
94 #endif /* __SILK_H */
95