1 /* 2 * Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR) 3 * 4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __SHMIN_H 10 #define __SHMIN_H 11 12 #define CONFIG_CPU_SH7706 1 13 /* T-SH7706LAN */ 14 #define CONFIG_SHMIN 1 15 /* T-SH7706LSR*/ 16 /* #define CONFIG_T_SH7706LSR 1 */ 17 18 #define CONFIG_BOOTARGS "console=ttySC0,115200" 19 20 /* 21 * This board has original boot loader. If you write u-boot to 0x0, 22 * you should set undef. 23 */ 24 #undef CONFIG_SHOW_BOOT_PROGRESS 25 #define CONFIG_DISPLAY_BOARDINFO 26 27 /* system */ 28 #define SHMIN_SDRAM_BASE (0x8C000000) 29 #define SHMIN_FLASH_BASE_1 (0xA0000000) 30 31 #define CONFIG_SYS_TEXT_BASE 0x8DFB0000 32 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 33 #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 34 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 35 #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 36 /* Buffer size for Boot Arguments passed to kernel */ 37 #define CONFIG_SYS_BARGSIZE 512 38 /* List of legal baudrate settings for this board */ 39 #define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 } 40 41 /* SCIF */ 42 #define CONFIG_CONS_SCIF0 1 43 44 /* memory */ 45 #define CONFIG_SYS_SDRAM_BASE SHMIN_SDRAM_BASE 46 #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) 47 #define CONFIG_SYS_MEMTEST_START SHMIN_SDRAM_BASE 48 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024)) 49 50 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024) 51 #define CONFIG_SYS_MONITOR_BASE (SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE) 52 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 53 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 54 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 55 56 /* FLASH */ 57 #define CONFIG_SYS_FLASH_CFI 58 #define CONFIG_FLASH_CFI_DRIVER 59 #undef CONFIG_SYS_FLASH_QUIET_TEST 60 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 61 #define CONFIG_SYS_FLASH_BASE SHMIN_FLASH_BASE_1 62 #define CONFIG_SYS_MAX_FLASH_SECT 11 63 #define CONFIG_SYS_MAX_FLASH_BANKS 1 64 65 #define CONFIG_FLASH_CFI_LEGACY 66 #define CONFIG_SYS_ATMEL_BASE CONFIG_SYS_FLASH_BASE 67 #define CONFIG_SYS_ATMEL_TOTALSECT CONFIG_SYS_MAX_FLASH_SECT 68 #define CONFIG_SYS_ATMEL_REGION 4 69 #define CONFIG_SYS_ATMEL_SECT {1, 2, 1, 7} 70 #define CONFIG_SYS_ATMEL_SECTSZ {0x4000, 0x2000, 0x8000, 0x10000} 71 72 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 73 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 74 75 #ifdef CONFIG_T_SH7706LSR 76 #define CONFIG_ENV_ADDR (SHMIN_FLASH_BASE_1 + 70000) 77 #else 78 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 79 #endif 80 81 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 82 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 83 84 /* Board Clock */ 85 #ifdef CONFIG_T_SH7706LSR 86 #define CONFIG_SYS_CLK_FREQ 40000000 87 #else 88 #define CONFIG_SYS_CLK_FREQ 33333333 89 #endif /* CONFIG_T_SH7706LSR */ 90 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 91 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 92 #define CONFIG_SYS_TMU_CLK_DIV 4 93 94 /* Network device */ 95 #define CONFIG_DRIVER_NE2000 96 #define CONFIG_DRIVER_NE2000_BASE (0xb0000300) 97 98 #endif /* __SHMIN_H */ 99