xref: /openbmc/u-boot/include/configs/sh7763rdp.h (revision db00e921)
1 /*
2  * Configuation settings for the Renesas SH7763RDP board
3  *
4  * Copyright (C) 2008 Renesas Solutions Corp.
5  * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __SH7763RDP_H
11 #define __SH7763RDP_H
12 
13 #define CONFIG_CPU_SH7763	1
14 #define __LITTLE_ENDIAN		1
15 
16 #define CONFIG_ENV_OVERWRITE    1
17 
18 #define CONFIG_DISPLAY_BOARDINFO
19 #undef  CONFIG_SHOW_BOOT_PROGRESS
20 
21 /* SCIF */
22 #define CONFIG_CONS_SCIF2		1
23 
24 #define CONFIG_SYS_TEXT_BASE	0x8FFC0000
25 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
26 #define CONFIG_SYS_PBSIZE		256	/* Buffer size for Console output */
27 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate
28 												settings for this board */
29 
30 /* SDRAM */
31 #define CONFIG_SYS_SDRAM_BASE		(0x8C000000)
32 #define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024)
33 #define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE)
34 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
35 
36 /* Flash(NOR) */
37 #define CONFIG_SYS_FLASH_BASE		(0xA0000000)
38 #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
39 #define CONFIG_SYS_MAX_FLASH_BANKS (1)
40 #define CONFIG_SYS_MAX_FLASH_SECT  (520)
41 
42 /* U-Boot setting */
43 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
44 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
45 #define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
46 /* Size of DRAM reserved for malloc() use */
47 #define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
48 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
49 
50 #define CONFIG_SYS_FLASH_CFI
51 #define CONFIG_FLASH_CFI_DRIVER
52 #undef  CONFIG_SYS_FLASH_QUIET_TEST
53 #define CONFIG_SYS_FLASH_EMPTY_INFO	/* print 'E' for empty sector on flinfo */
54 /* Timeout for Flash erase operations (in ms) */
55 #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
56 /* Timeout for Flash write operations (in ms) */
57 #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
58 /* Timeout for Flash set sector lock bit operations (in ms) */
59 #define CONFIG_SYS_FLASH_LOCK_TOUT		(3 * 1000)
60 /* Timeout for Flash clear lock bit operations (in ms) */
61 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
62 /* Use hardware flash sectors protection instead of U-Boot software protection */
63 #undef  CONFIG_SYS_FLASH_PROTECTION
64 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
65 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
66 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
67 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
68 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
69 #define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
70 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
71 #define CONFIG_ENV_ADDR_REDUND	(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
72 
73 /* Clock */
74 #define CONFIG_SYS_CLK_FREQ	66666666
75 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
76 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
77 #define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
78 
79 /* Ether */
80 #define CONFIG_SH_ETHER 1
81 #define CONFIG_SH_ETHER_USE_PORT (1)
82 #define CONFIG_SH_ETHER_PHY_ADDR (0x01)
83 #define CONFIG_BITBANGMII
84 #define CONFIG_BITBANGMII_MULTI
85 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
86 
87 #endif /* __SH7763RDP_H */
88