1 /* 2 * Configuation settings for the sh7757lcr board 3 * 4 * Copyright (C) 2011 Renesas Solutions Corp. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __SH7757LCR_H 10 #define __SH7757LCR_H 11 12 #undef DEBUG 13 #define CONFIG_SH 1 14 #define CONFIG_SH4A 1 15 #define CONFIG_SH_32BIT 1 16 #define CONFIG_CPU_SH7757 1 17 #define CONFIG_SH7757LCR 1 18 #define CONFIG_SH7757LCR_DDR_ECC 1 19 20 #define CONFIG_SYS_TEXT_BASE 0x8ef80000 21 #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7757lcr/u-boot.lds" 22 23 #define CONFIG_CMD_MEMORY 24 #define CONFIG_CMD_NET 25 #define CONFIG_CMD_MII 26 #define CONFIG_CMD_PING 27 #define CONFIG_CMD_NFS 28 #define CONFIG_CMD_SDRAM 29 #define CONFIG_CMD_SF 30 #define CONFIG_CMD_RUN 31 #define CONFIG_CMD_SAVEENV 32 #define CONFIG_CMD_MD5SUM 33 #define CONFIG_MD5 34 #define CONFIG_CMD_LOADS 35 #define CONFIG_CMD_MMC 36 #define CONFIG_CMD_EXT2 37 #define CONFIG_DOS_PARTITION 38 #define CONFIG_MAC_PARTITION 39 40 #define CONFIG_BAUDRATE 115200 41 #define CONFIG_BOOTDELAY 3 42 #define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp" 43 44 #define CONFIG_VERSION_VARIABLE 45 #undef CONFIG_SHOW_BOOT_PROGRESS 46 47 /* MEMORY */ 48 #define SH7757LCR_SDRAM_BASE (0x80000000) 49 #define SH7757LCR_SDRAM_SIZE (240 * 1024 * 1024) 50 #define SH7757LCR_SDRAM_ECC_SETTING 0x0f000000 /* 240MByte */ 51 #define SH7757LCR_SDRAM_DVC_SIZE (16 * 1024 * 1024) 52 53 #define CONFIG_SYS_LONGHELP 54 #define CONFIG_SYS_PROMPT "=> " 55 #define CONFIG_SYS_CBSIZE 256 56 #define CONFIG_SYS_PBSIZE 256 57 #define CONFIG_SYS_MAXARGS 16 58 #define CONFIG_SYS_BARGSIZE 512 59 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 60 61 /* SCIF */ 62 #define CONFIG_SCIF_CONSOLE 1 63 #define CONFIG_CONS_SCIF2 1 64 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 65 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 66 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 67 68 #define CONFIG_SYS_MEMTEST_START (SH7757LCR_SDRAM_BASE) 69 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 70 224 * 1024 * 1024) 71 #undef CONFIG_SYS_ALT_MEMTEST 72 #undef CONFIG_SYS_MEMTEST_SCRATCH 73 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 74 75 #define CONFIG_SYS_SDRAM_BASE (SH7757LCR_SDRAM_BASE) 76 #define CONFIG_SYS_SDRAM_SIZE (SH7757LCR_SDRAM_SIZE) 77 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ 78 (128 + 16) * 1024 * 1024) 79 80 #define CONFIG_SYS_MONITOR_BASE 0x00000000 81 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 82 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 83 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 84 85 /* FLASH */ 86 #define CONFIG_SYS_NO_FLASH 87 88 /* Ether */ 89 #define CONFIG_SH_ETHER 1 90 #define CONFIG_SH_ETHER_USE_PORT 0 91 #define CONFIG_SH_ETHER_PHY_ADDR 1 92 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 93 #define CONFIG_PHYLIB 94 #define CONFIG_BITBANGMII 95 #define CONFIG_BITBANGMII_MULTI 96 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 97 98 #define SH7757LCR_ETHERNET_MAC_BASE_SPI 0x000b0000 99 #define SH7757LCR_SPI_SECTOR_SIZE (64 * 1024) 100 #define SH7757LCR_ETHERNET_MAC_BASE SH7757LCR_ETHERNET_MAC_BASE_SPI 101 #define SH7757LCR_ETHERNET_MAC_SIZE 17 102 #define SH7757LCR_ETHERNET_NUM_CH 2 103 #define CONFIG_BOARD_LATE_INIT 104 105 /* Gigabit Ether */ 106 #define SH7757LCR_GIGA_ETHERNET_NUM_CH 2 107 108 /* SPI */ 109 #define CONFIG_SH_SPI 1 110 #define CONFIG_SH_SPI_BASE 0xfe002000 111 #define CONFIG_SPI_FLASH 112 #define CONFIG_SPI_FLASH_STMICRO 1 113 114 /* MMCIF */ 115 #define CONFIG_MMC 1 116 #define CONFIG_GENERIC_MMC 1 117 #define CONFIG_SH_MMCIF 1 118 #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 119 #define CONFIG_SH_MMCIF_CLK 48000000 120 121 /* SH7757 board */ 122 #define SH7757LCR_SDRAM_PHYS_TOP 0x40000000 123 #define SH7757LCR_GRA_OFFSET 0x1f000000 124 #define SH7757LCR_PCIEBRG_ADDR_B0 0x000a0000 125 #define SH7757LCR_PCIEBRG_SIZE_B0 (64 * 1024) 126 #define SH7757LCR_PCIEBRG_ADDR 0x00090000 127 #define SH7757LCR_PCIEBRG_SIZE (96 * 1024) 128 129 /* ENV setting */ 130 #define CONFIG_ENV_IS_EMBEDDED 131 #define CONFIG_ENV_IS_IN_SPI_FLASH 132 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 133 #define CONFIG_ENV_ADDR (0x00080000) 134 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 135 #define CONFIG_ENV_OVERWRITE 1 136 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 137 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 138 #define CONFIG_EXTRA_ENV_SETTINGS \ 139 "netboot=bootp; bootm\0" 140 141 /* Board Clock */ 142 #define CONFIG_SYS_CLK_FREQ 48000000 143 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 144 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 145 #define CONFIG_SYS_TMU_CLK_DIV 4 146 #define CONFIG_SYS_HZ 1000 147 #endif /* __SH7757LCR_H */ 148