1 /* 2 * Configuation settings for the sh7757lcr board 3 * 4 * Copyright (C) 2011 Renesas Solutions Corp. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __SH7757LCR_H 10 #define __SH7757LCR_H 11 12 #undef DEBUG 13 #define CONFIG_CPU_SH7757 1 14 #define CONFIG_SH7757LCR 1 15 #define CONFIG_SH7757LCR_DDR_ECC 1 16 17 #define CONFIG_SYS_TEXT_BASE 0x8ef80000 18 #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7757lcr/u-boot.lds" 19 20 #define CONFIG_CMD_MEMORY 21 #define CONFIG_CMD_MII 22 #define CONFIG_CMD_PING 23 #define CONFIG_CMD_NFS 24 #define CONFIG_CMD_SDRAM 25 #define CONFIG_CMD_SF 26 #define CONFIG_CMD_RUN 27 #define CONFIG_CMD_SAVEENV 28 #define CONFIG_CMD_MD5SUM 29 #define CONFIG_MD5 30 #define CONFIG_CMD_LOADS 31 #define CONFIG_CMD_MMC 32 #define CONFIG_CMD_EXT2 33 #define CONFIG_DOS_PARTITION 34 #define CONFIG_MAC_PARTITION 35 36 #define CONFIG_BAUDRATE 115200 37 #define CONFIG_BOOTDELAY 3 38 #define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp" 39 40 #define CONFIG_VERSION_VARIABLE 41 #undef CONFIG_SHOW_BOOT_PROGRESS 42 43 /* MEMORY */ 44 #define SH7757LCR_SDRAM_BASE (0x80000000) 45 #define SH7757LCR_SDRAM_SIZE (240 * 1024 * 1024) 46 #define SH7757LCR_SDRAM_ECC_SETTING 0x0f000000 /* 240MByte */ 47 #define SH7757LCR_SDRAM_DVC_SIZE (16 * 1024 * 1024) 48 49 #define CONFIG_SYS_LONGHELP 50 #define CONFIG_SYS_CBSIZE 256 51 #define CONFIG_SYS_PBSIZE 256 52 #define CONFIG_SYS_MAXARGS 16 53 #define CONFIG_SYS_BARGSIZE 512 54 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 55 56 /* SCIF */ 57 #define CONFIG_SCIF_CONSOLE 1 58 #define CONFIG_CONS_SCIF2 1 59 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 60 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 61 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 62 63 #define CONFIG_SYS_MEMTEST_START (SH7757LCR_SDRAM_BASE) 64 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 65 224 * 1024 * 1024) 66 #undef CONFIG_SYS_ALT_MEMTEST 67 #undef CONFIG_SYS_MEMTEST_SCRATCH 68 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 69 70 #define CONFIG_SYS_SDRAM_BASE (SH7757LCR_SDRAM_BASE) 71 #define CONFIG_SYS_SDRAM_SIZE (SH7757LCR_SDRAM_SIZE) 72 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ 73 (128 + 16) * 1024 * 1024) 74 75 #define CONFIG_SYS_MONITOR_BASE 0x00000000 76 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 77 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 78 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 79 80 /* FLASH */ 81 #define CONFIG_SYS_NO_FLASH 82 83 /* Ether */ 84 #define CONFIG_SH_ETHER 1 85 #define CONFIG_SH_ETHER_USE_PORT 0 86 #define CONFIG_SH_ETHER_PHY_ADDR 1 87 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 88 #define CONFIG_PHYLIB 89 #define CONFIG_BITBANGMII 90 #define CONFIG_BITBANGMII_MULTI 91 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 92 93 #define SH7757LCR_ETHERNET_MAC_BASE_SPI 0x000b0000 94 #define SH7757LCR_SPI_SECTOR_SIZE (64 * 1024) 95 #define SH7757LCR_ETHERNET_MAC_BASE SH7757LCR_ETHERNET_MAC_BASE_SPI 96 #define SH7757LCR_ETHERNET_MAC_SIZE 17 97 #define SH7757LCR_ETHERNET_NUM_CH 2 98 #define CONFIG_BOARD_LATE_INIT 99 100 /* Gigabit Ether */ 101 #define SH7757LCR_GIGA_ETHERNET_NUM_CH 2 102 103 /* SPI */ 104 #define CONFIG_SH_SPI 1 105 #define CONFIG_SH_SPI_BASE 0xfe002000 106 #define CONFIG_SPI_FLASH 107 #define CONFIG_SPI_FLASH_STMICRO 1 108 109 /* MMCIF */ 110 #define CONFIG_MMC 1 111 #define CONFIG_GENERIC_MMC 1 112 #define CONFIG_SH_MMCIF 1 113 #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 114 #define CONFIG_SH_MMCIF_CLK 48000000 115 116 /* SH7757 board */ 117 #define SH7757LCR_SDRAM_PHYS_TOP 0x40000000 118 #define SH7757LCR_GRA_OFFSET 0x1f000000 119 #define SH7757LCR_PCIEBRG_ADDR_B0 0x000a0000 120 #define SH7757LCR_PCIEBRG_SIZE_B0 (64 * 1024) 121 #define SH7757LCR_PCIEBRG_ADDR 0x00090000 122 #define SH7757LCR_PCIEBRG_SIZE (96 * 1024) 123 124 /* ENV setting */ 125 #define CONFIG_ENV_IS_EMBEDDED 126 #define CONFIG_ENV_IS_IN_SPI_FLASH 127 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 128 #define CONFIG_ENV_ADDR (0x00080000) 129 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 130 #define CONFIG_ENV_OVERWRITE 1 131 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 132 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 133 #define CONFIG_EXTRA_ENV_SETTINGS \ 134 "netboot=bootp; bootm\0" 135 136 /* Board Clock */ 137 #define CONFIG_SYS_CLK_FREQ 48000000 138 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 139 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 140 #define CONFIG_SYS_TMU_CLK_DIV 4 141 #endif /* __SH7757LCR_H */ 142