1 /* 2 * Configuation settings for the sh7753evb board 3 * 4 * Copyright (C) 2012 Renesas Solutions Corp. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __SH7753EVB_H 10 #define __SH7753EVB_H 11 12 #undef DEBUG 13 #define CONFIG_CPU_SH7753 1 14 #define CONFIG_SH7753EVB 1 15 16 #define CONFIG_SYS_TEXT_BASE 0x5ff80000 17 #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7753evb/u-boot.lds" 18 19 #define CONFIG_CMD_DFL 20 #define CONFIG_CMD_SDRAM 21 #define CONFIG_CMD_MD5SUM 22 #define CONFIG_MD5 23 #define CONFIG_DOS_PARTITION 24 #define CONFIG_MAC_PARTITION 25 26 #define CONFIG_BAUDRATE 115200 27 #define CONFIG_BOOTDELAY 3 28 #define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp" 29 30 #define CONFIG_VERSION_VARIABLE 31 #undef CONFIG_SHOW_BOOT_PROGRESS 32 #define CONFIG_CMDLINE_EDITING 33 #define CONFIG_AUTO_COMPLETE 34 35 /* MEMORY */ 36 #define SH7753EVB_SDRAM_BASE (0x40000000) 37 #define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024) 38 39 #define CONFIG_SYS_LONGHELP 40 #define CONFIG_SYS_CBSIZE 256 41 #define CONFIG_SYS_PBSIZE 256 42 #define CONFIG_SYS_MAXARGS 16 43 #define CONFIG_SYS_BARGSIZE 512 44 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 45 46 /* SCIF */ 47 #define CONFIG_SCIF_CONSOLE 1 48 #define CONFIG_CONS_SCIF2 1 49 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 50 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 51 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 52 53 #define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE) 54 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 55 480 * 1024 * 1024) 56 #undef CONFIG_SYS_ALT_MEMTEST 57 #undef CONFIG_SYS_MEMTEST_SCRATCH 58 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 59 60 #define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE) 61 #define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE) 62 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ 63 128 * 1024 * 1024) 64 65 #define CONFIG_SYS_MONITOR_BASE 0x00000000 66 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 67 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 68 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 69 70 /* FLASH */ 71 #define CONFIG_SYS_NO_FLASH 72 73 /* Ether */ 74 #define CONFIG_SH_ETHER 1 75 #define CONFIG_SH_ETHER_USE_PORT 0 76 #define CONFIG_SH_ETHER_PHY_ADDR 18 77 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 78 #define CONFIG_SH_ETHER_USE_GETHER 1 79 #define CONFIG_PHYLIB 80 #define CONFIG_BITBANGMII 81 #define CONFIG_BITBANGMII_MULTI 82 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII 83 #define CONFIG_PHY_VITESSE 84 85 #define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000 86 #define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024) 87 #define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI 88 #define SH7753EVB_ETHERNET_MAC_SIZE 17 89 #define SH7753EVB_ETHERNET_NUM_CH 2 90 #define CONFIG_BOARD_LATE_INIT 91 92 /* SPI */ 93 #define CONFIG_SH_SPI 1 94 #define CONFIG_SH_SPI_BASE 0xfe002000 95 96 /* MMCIF */ 97 #define CONFIG_MMC 1 98 #define CONFIG_GENERIC_MMC 1 99 #define CONFIG_SH_MMCIF 1 100 #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 101 #define CONFIG_SH_MMCIF_CLK 48000000 102 103 /* ENV setting */ 104 #define CONFIG_ENV_IS_EMBEDDED 105 #define CONFIG_ENV_IS_IN_SPI_FLASH 106 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 107 #define CONFIG_ENV_ADDR (0x00080000) 108 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 109 #define CONFIG_ENV_OVERWRITE 1 110 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 111 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 112 #define CONFIG_EXTRA_ENV_SETTINGS \ 113 "netboot=bootp; bootm\0" 114 115 /* Board Clock */ 116 #define CONFIG_SYS_CLK_FREQ 48000000 117 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 118 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 119 #define CONFIG_SYS_TMU_CLK_DIV 4 120 #endif /* __SH7753EVB_H */ 121