xref: /openbmc/u-boot/include/configs/sh7753evb.h (revision c2012cb4)
1 /*
2  * Configuation settings for the sh7753evb board
3  *
4  * Copyright (C) 2012 Renesas Solutions Corp.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __SH7753EVB_H
10 #define __SH7753EVB_H
11 
12 #define CONFIG_CPU_SH7753	1
13 #define CONFIG_SH7753EVB	1
14 
15 #define CONFIG_SYS_TEXT_BASE	0x5ff80000
16 
17 #define CONFIG_CMD_SDRAM
18 
19 #define CONFIG_BOOTARGS		"console=ttySC2,115200 root=/dev/nfs ip=dhcp"
20 
21 #define CONFIG_DISPLAY_BOARDINFO
22 #undef	CONFIG_SHOW_BOOT_PROGRESS
23 #define CONFIG_CMDLINE_EDITING
24 #define CONFIG_AUTO_COMPLETE
25 
26 /* MEMORY */
27 #define SH7753EVB_SDRAM_BASE		(0x40000000)
28 #define SH7753EVB_SDRAM_SIZE		(512 * 1024 * 1024)
29 
30 #define CONFIG_SYS_LONGHELP
31 #define CONFIG_SYS_CBSIZE		256
32 #define CONFIG_SYS_PBSIZE		256
33 #define CONFIG_SYS_MAXARGS		16
34 #define CONFIG_SYS_BARGSIZE		512
35 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
36 
37 /* SCIF */
38 #define CONFIG_SCIF_CONSOLE	1
39 #define CONFIG_CONS_SCIF2	1
40 
41 #define CONFIG_SYS_MEMTEST_START	(SH7753EVB_SDRAM_BASE)
42 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
43 					 480 * 1024 * 1024)
44 #undef	CONFIG_SYS_ALT_MEMTEST
45 #undef	CONFIG_SYS_MEMTEST_SCRATCH
46 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
47 
48 #define CONFIG_SYS_SDRAM_BASE		(SH7753EVB_SDRAM_BASE)
49 #define CONFIG_SYS_SDRAM_SIZE		(SH7753EVB_SDRAM_SIZE)
50 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
51 					 128 * 1024 * 1024)
52 
53 #define CONFIG_SYS_MONITOR_BASE		0x00000000
54 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
55 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
56 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
57 
58 /* Ether */
59 #define CONFIG_SH_ETHER			1
60 #define CONFIG_SH_ETHER_USE_PORT	0
61 #define CONFIG_SH_ETHER_PHY_ADDR	18
62 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
63 #define CONFIG_SH_ETHER_USE_GETHER	1
64 #define CONFIG_PHYLIB
65 #define CONFIG_BITBANGMII
66 #define CONFIG_BITBANGMII_MULTI
67 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
68 #define CONFIG_PHY_VITESSE
69 
70 #define SH7753EVB_ETHERNET_MAC_BASE_SPI	0x00090000
71 #define SH7753EVB_SPI_SECTOR_SIZE	(64 * 1024)
72 #define SH7753EVB_ETHERNET_MAC_BASE	SH7753EVB_ETHERNET_MAC_BASE_SPI
73 #define SH7753EVB_ETHERNET_MAC_SIZE	17
74 #define SH7753EVB_ETHERNET_NUM_CH	2
75 
76 /* SPI */
77 #define CONFIG_SH_SPI			1
78 #define CONFIG_SH_SPI_BASE		0xfe002000
79 
80 /* MMCIF */
81 #define CONFIG_SH_MMCIF			1
82 #define CONFIG_SH_MMCIF_ADDR		0xffcb0000
83 #define CONFIG_SH_MMCIF_CLK		48000000
84 
85 /* ENV setting */
86 #define CONFIG_ENV_IS_EMBEDDED
87 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
88 #define CONFIG_ENV_ADDR		(0x00080000)
89 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
90 #define CONFIG_ENV_OVERWRITE	1
91 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
92 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
93 #define CONFIG_EXTRA_ENV_SETTINGS				\
94 		"netboot=bootp; bootm\0"
95 
96 /* Board Clock */
97 #define CONFIG_SYS_CLK_FREQ	48000000
98 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
99 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
100 #define CONFIG_SYS_TMU_CLK_DIV	4
101 #endif	/* __SH7753EVB_H */
102