xref: /openbmc/u-boot/include/configs/sh7753evb.h (revision c0fa385c)
1 /*
2  * Configuation settings for the sh7753evb board
3  *
4  * Copyright (C) 2012 Renesas Solutions Corp.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __SH7753EVB_H
10 #define __SH7753EVB_H
11 
12 #define CONFIG_CPU_SH7753	1
13 #define CONFIG_SH7753EVB	1
14 
15 #define CONFIG_SYS_TEXT_BASE	0x5ff80000
16 
17 #define CONFIG_CMD_DFL
18 #define CONFIG_CMD_SDRAM
19 #define CONFIG_CMD_MD5SUM
20 #define CONFIG_MD5
21 #define CONFIG_DOS_PARTITION
22 #define CONFIG_MAC_PARTITION
23 
24 #define CONFIG_BAUDRATE		115200
25 #define CONFIG_BOOTARGS		"console=ttySC2,115200 root=/dev/nfs ip=dhcp"
26 
27 #define CONFIG_DISPLAY_BOARDINFO
28 #undef	CONFIG_SHOW_BOOT_PROGRESS
29 #define CONFIG_CMDLINE_EDITING
30 #define CONFIG_AUTO_COMPLETE
31 
32 /* MEMORY */
33 #define SH7753EVB_SDRAM_BASE		(0x40000000)
34 #define SH7753EVB_SDRAM_SIZE		(512 * 1024 * 1024)
35 
36 #define CONFIG_SYS_LONGHELP
37 #define CONFIG_SYS_CBSIZE		256
38 #define CONFIG_SYS_PBSIZE		256
39 #define CONFIG_SYS_MAXARGS		16
40 #define CONFIG_SYS_BARGSIZE		512
41 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
42 
43 /* SCIF */
44 #define CONFIG_SCIF_CONSOLE	1
45 #define CONFIG_CONS_SCIF2	1
46 
47 #define CONFIG_SYS_MEMTEST_START	(SH7753EVB_SDRAM_BASE)
48 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
49 					 480 * 1024 * 1024)
50 #undef	CONFIG_SYS_ALT_MEMTEST
51 #undef	CONFIG_SYS_MEMTEST_SCRATCH
52 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
53 
54 #define CONFIG_SYS_SDRAM_BASE		(SH7753EVB_SDRAM_BASE)
55 #define CONFIG_SYS_SDRAM_SIZE		(SH7753EVB_SDRAM_SIZE)
56 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
57 					 128 * 1024 * 1024)
58 
59 #define CONFIG_SYS_MONITOR_BASE		0x00000000
60 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
61 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
62 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
63 
64 /* FLASH */
65 #define CONFIG_SYS_NO_FLASH
66 
67 /* Ether */
68 #define CONFIG_SH_ETHER			1
69 #define CONFIG_SH_ETHER_USE_PORT	0
70 #define CONFIG_SH_ETHER_PHY_ADDR	18
71 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
72 #define CONFIG_SH_ETHER_USE_GETHER	1
73 #define CONFIG_PHYLIB
74 #define CONFIG_BITBANGMII
75 #define CONFIG_BITBANGMII_MULTI
76 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
77 #define CONFIG_PHY_VITESSE
78 
79 #define SH7753EVB_ETHERNET_MAC_BASE_SPI	0x00090000
80 #define SH7753EVB_SPI_SECTOR_SIZE	(64 * 1024)
81 #define SH7753EVB_ETHERNET_MAC_BASE	SH7753EVB_ETHERNET_MAC_BASE_SPI
82 #define SH7753EVB_ETHERNET_MAC_SIZE	17
83 #define SH7753EVB_ETHERNET_NUM_CH	2
84 #define CONFIG_BOARD_LATE_INIT
85 
86 /* SPI */
87 #define CONFIG_SH_SPI			1
88 #define CONFIG_SH_SPI_BASE		0xfe002000
89 
90 /* MMCIF */
91 #define CONFIG_GENERIC_MMC		1
92 #define CONFIG_SH_MMCIF			1
93 #define CONFIG_SH_MMCIF_ADDR		0xffcb0000
94 #define CONFIG_SH_MMCIF_CLK		48000000
95 
96 /* ENV setting */
97 #define CONFIG_ENV_IS_EMBEDDED
98 #define CONFIG_ENV_IS_IN_SPI_FLASH
99 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
100 #define CONFIG_ENV_ADDR		(0x00080000)
101 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
102 #define CONFIG_ENV_OVERWRITE	1
103 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
104 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
105 #define CONFIG_EXTRA_ENV_SETTINGS				\
106 		"netboot=bootp; bootm\0"
107 
108 /* Board Clock */
109 #define CONFIG_SYS_CLK_FREQ	48000000
110 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
111 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
112 #define CONFIG_SYS_TMU_CLK_DIV	4
113 #endif	/* __SH7753EVB_H */
114