xref: /openbmc/u-boot/include/configs/sh7753evb.h (revision 9cb05a8f)
1 /*
2  * Configuation settings for the sh7753evb board
3  *
4  * Copyright (C) 2012 Renesas Solutions Corp.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __SH7753EVB_H
10 #define __SH7753EVB_H
11 
12 #undef DEBUG
13 #define CONFIG_CPU_SH7753	1
14 #define CONFIG_SH7753EVB	1
15 
16 #define CONFIG_SYS_TEXT_BASE	0x5ff80000
17 #define CONFIG_SYS_LDSCRIPT	"board/renesas/sh7753evb/u-boot.lds"
18 
19 #define CONFIG_CMD_MII
20 #define CONFIG_CMD_PING
21 #define CONFIG_CMD_DFL
22 #define CONFIG_CMD_SDRAM
23 #define CONFIG_CMD_SF
24 #define CONFIG_CMD_MD5SUM
25 #define CONFIG_MD5
26 #define CONFIG_CMD_MMC
27 #define CONFIG_CMD_EXT2
28 #define CONFIG_DOS_PARTITION
29 #define CONFIG_MAC_PARTITION
30 
31 #define CONFIG_BAUDRATE		115200
32 #define CONFIG_BOOTDELAY	3
33 #define CONFIG_BOOTARGS		"console=ttySC2,115200 root=/dev/nfs ip=dhcp"
34 
35 #define CONFIG_VERSION_VARIABLE
36 #undef	CONFIG_SHOW_BOOT_PROGRESS
37 #define CONFIG_CMDLINE_EDITING
38 #define CONFIG_AUTO_COMPLETE
39 
40 /* MEMORY */
41 #define SH7753EVB_SDRAM_BASE		(0x40000000)
42 #define SH7753EVB_SDRAM_SIZE		(512 * 1024 * 1024)
43 
44 #define CONFIG_SYS_LONGHELP
45 #define CONFIG_SYS_CBSIZE		256
46 #define CONFIG_SYS_PBSIZE		256
47 #define CONFIG_SYS_MAXARGS		16
48 #define CONFIG_SYS_BARGSIZE		512
49 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
50 
51 /* SCIF */
52 #define CONFIG_SCIF_CONSOLE	1
53 #define CONFIG_CONS_SCIF2	1
54 #undef	CONFIG_SYS_CONSOLE_INFO_QUIET
55 #undef	CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
56 #undef	CONFIG_SYS_CONSOLE_ENV_OVERWRITE
57 
58 #define CONFIG_SYS_MEMTEST_START	(SH7753EVB_SDRAM_BASE)
59 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
60 					 480 * 1024 * 1024)
61 #undef	CONFIG_SYS_ALT_MEMTEST
62 #undef	CONFIG_SYS_MEMTEST_SCRATCH
63 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
64 
65 #define CONFIG_SYS_SDRAM_BASE		(SH7753EVB_SDRAM_BASE)
66 #define CONFIG_SYS_SDRAM_SIZE		(SH7753EVB_SDRAM_SIZE)
67 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
68 					 128 * 1024 * 1024)
69 
70 #define CONFIG_SYS_MONITOR_BASE		0x00000000
71 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
72 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
73 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
74 
75 /* FLASH */
76 #define CONFIG_SYS_NO_FLASH
77 
78 /* Ether */
79 #define CONFIG_SH_ETHER			1
80 #define CONFIG_SH_ETHER_USE_PORT	0
81 #define CONFIG_SH_ETHER_PHY_ADDR	18
82 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
83 #define CONFIG_SH_ETHER_USE_GETHER	1
84 #define CONFIG_PHYLIB
85 #define CONFIG_BITBANGMII
86 #define CONFIG_BITBANGMII_MULTI
87 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
88 #define CONFIG_PHY_VITESSE
89 
90 #define SH7753EVB_ETHERNET_MAC_BASE_SPI	0x00090000
91 #define SH7753EVB_SPI_SECTOR_SIZE	(64 * 1024)
92 #define SH7753EVB_ETHERNET_MAC_BASE	SH7753EVB_ETHERNET_MAC_BASE_SPI
93 #define SH7753EVB_ETHERNET_MAC_SIZE	17
94 #define SH7753EVB_ETHERNET_NUM_CH	2
95 #define CONFIG_BOARD_LATE_INIT
96 
97 /* SPI */
98 #define CONFIG_SH_SPI			1
99 #define CONFIG_SH_SPI_BASE		0xfe002000
100 
101 /* MMCIF */
102 #define CONFIG_MMC			1
103 #define CONFIG_GENERIC_MMC		1
104 #define CONFIG_SH_MMCIF			1
105 #define CONFIG_SH_MMCIF_ADDR		0xffcb0000
106 #define CONFIG_SH_MMCIF_CLK		48000000
107 
108 /* ENV setting */
109 #define CONFIG_ENV_IS_EMBEDDED
110 #define CONFIG_ENV_IS_IN_SPI_FLASH
111 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
112 #define CONFIG_ENV_ADDR		(0x00080000)
113 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
114 #define CONFIG_ENV_OVERWRITE	1
115 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
116 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
117 #define CONFIG_EXTRA_ENV_SETTINGS				\
118 		"netboot=bootp; bootm\0"
119 
120 /* Board Clock */
121 #define CONFIG_SYS_CLK_FREQ	48000000
122 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
123 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
124 #define CONFIG_SYS_TMU_CLK_DIV	4
125 #endif	/* __SH7753EVB_H */
126