1 /* 2 * Configuation settings for the sh7753evb board 3 * 4 * Copyright (C) 2012 Renesas Solutions Corp. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __SH7753EVB_H 10 #define __SH7753EVB_H 11 12 #undef DEBUG 13 #define CONFIG_CPU_SH7753 1 14 #define CONFIG_SH7753EVB 1 15 16 #define CONFIG_SYS_TEXT_BASE 0x5ff80000 17 #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7753evb/u-boot.lds" 18 19 #define CONFIG_CMD_DFL 20 #define CONFIG_CMD_SDRAM 21 #define CONFIG_CMD_MD5SUM 22 #define CONFIG_MD5 23 #define CONFIG_DOS_PARTITION 24 #define CONFIG_MAC_PARTITION 25 26 #define CONFIG_BAUDRATE 115200 27 #define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp" 28 29 #undef CONFIG_SHOW_BOOT_PROGRESS 30 #define CONFIG_CMDLINE_EDITING 31 #define CONFIG_AUTO_COMPLETE 32 33 /* MEMORY */ 34 #define SH7753EVB_SDRAM_BASE (0x40000000) 35 #define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024) 36 37 #define CONFIG_SYS_LONGHELP 38 #define CONFIG_SYS_CBSIZE 256 39 #define CONFIG_SYS_PBSIZE 256 40 #define CONFIG_SYS_MAXARGS 16 41 #define CONFIG_SYS_BARGSIZE 512 42 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 43 44 /* SCIF */ 45 #define CONFIG_SCIF_CONSOLE 1 46 #define CONFIG_CONS_SCIF2 1 47 48 #define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE) 49 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 50 480 * 1024 * 1024) 51 #undef CONFIG_SYS_ALT_MEMTEST 52 #undef CONFIG_SYS_MEMTEST_SCRATCH 53 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 54 55 #define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE) 56 #define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE) 57 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ 58 128 * 1024 * 1024) 59 60 #define CONFIG_SYS_MONITOR_BASE 0x00000000 61 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 62 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 63 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 64 65 /* FLASH */ 66 #define CONFIG_SYS_NO_FLASH 67 68 /* Ether */ 69 #define CONFIG_SH_ETHER 1 70 #define CONFIG_SH_ETHER_USE_PORT 0 71 #define CONFIG_SH_ETHER_PHY_ADDR 18 72 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 73 #define CONFIG_SH_ETHER_USE_GETHER 1 74 #define CONFIG_PHYLIB 75 #define CONFIG_BITBANGMII 76 #define CONFIG_BITBANGMII_MULTI 77 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII 78 #define CONFIG_PHY_VITESSE 79 80 #define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000 81 #define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024) 82 #define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI 83 #define SH7753EVB_ETHERNET_MAC_SIZE 17 84 #define SH7753EVB_ETHERNET_NUM_CH 2 85 #define CONFIG_BOARD_LATE_INIT 86 87 /* SPI */ 88 #define CONFIG_SH_SPI 1 89 #define CONFIG_SH_SPI_BASE 0xfe002000 90 91 /* MMCIF */ 92 #define CONFIG_MMC 1 93 #define CONFIG_GENERIC_MMC 1 94 #define CONFIG_SH_MMCIF 1 95 #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 96 #define CONFIG_SH_MMCIF_CLK 48000000 97 98 /* ENV setting */ 99 #define CONFIG_ENV_IS_EMBEDDED 100 #define CONFIG_ENV_IS_IN_SPI_FLASH 101 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 102 #define CONFIG_ENV_ADDR (0x00080000) 103 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 104 #define CONFIG_ENV_OVERWRITE 1 105 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 106 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 107 #define CONFIG_EXTRA_ENV_SETTINGS \ 108 "netboot=bootp; bootm\0" 109 110 /* Board Clock */ 111 #define CONFIG_SYS_CLK_FREQ 48000000 112 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 113 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 114 #define CONFIG_SYS_TMU_CLK_DIV 4 115 #endif /* __SH7753EVB_H */ 116