xref: /openbmc/u-boot/include/configs/sh7753evb.h (revision 1878804a)
1 /*
2  * Configuation settings for the sh7753evb board
3  *
4  * Copyright (C) 2012 Renesas Solutions Corp.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __SH7753EVB_H
10 #define __SH7753EVB_H
11 
12 #define CONFIG_CPU_SH7753	1
13 #define CONFIG_SH7753EVB	1
14 
15 #define CONFIG_SYS_TEXT_BASE	0x5ff80000
16 
17 #define CONFIG_CMD_DFL
18 #define CONFIG_CMD_SDRAM
19 
20 #define CONFIG_BOOTARGS		"console=ttySC2,115200 root=/dev/nfs ip=dhcp"
21 
22 #define CONFIG_DISPLAY_BOARDINFO
23 #undef	CONFIG_SHOW_BOOT_PROGRESS
24 #define CONFIG_CMDLINE_EDITING
25 #define CONFIG_AUTO_COMPLETE
26 
27 /* MEMORY */
28 #define SH7753EVB_SDRAM_BASE		(0x40000000)
29 #define SH7753EVB_SDRAM_SIZE		(512 * 1024 * 1024)
30 
31 #define CONFIG_SYS_LONGHELP
32 #define CONFIG_SYS_CBSIZE		256
33 #define CONFIG_SYS_PBSIZE		256
34 #define CONFIG_SYS_MAXARGS		16
35 #define CONFIG_SYS_BARGSIZE		512
36 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
37 
38 /* SCIF */
39 #define CONFIG_SCIF_CONSOLE	1
40 #define CONFIG_CONS_SCIF2	1
41 
42 #define CONFIG_SYS_MEMTEST_START	(SH7753EVB_SDRAM_BASE)
43 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
44 					 480 * 1024 * 1024)
45 #undef	CONFIG_SYS_ALT_MEMTEST
46 #undef	CONFIG_SYS_MEMTEST_SCRATCH
47 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
48 
49 #define CONFIG_SYS_SDRAM_BASE		(SH7753EVB_SDRAM_BASE)
50 #define CONFIG_SYS_SDRAM_SIZE		(SH7753EVB_SDRAM_SIZE)
51 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
52 					 128 * 1024 * 1024)
53 
54 #define CONFIG_SYS_MONITOR_BASE		0x00000000
55 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
56 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
57 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
58 
59 /* Ether */
60 #define CONFIG_SH_ETHER			1
61 #define CONFIG_SH_ETHER_USE_PORT	0
62 #define CONFIG_SH_ETHER_PHY_ADDR	18
63 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
64 #define CONFIG_SH_ETHER_USE_GETHER	1
65 #define CONFIG_PHYLIB
66 #define CONFIG_BITBANGMII
67 #define CONFIG_BITBANGMII_MULTI
68 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
69 #define CONFIG_PHY_VITESSE
70 
71 #define SH7753EVB_ETHERNET_MAC_BASE_SPI	0x00090000
72 #define SH7753EVB_SPI_SECTOR_SIZE	(64 * 1024)
73 #define SH7753EVB_ETHERNET_MAC_BASE	SH7753EVB_ETHERNET_MAC_BASE_SPI
74 #define SH7753EVB_ETHERNET_MAC_SIZE	17
75 #define SH7753EVB_ETHERNET_NUM_CH	2
76 
77 /* SPI */
78 #define CONFIG_SH_SPI			1
79 #define CONFIG_SH_SPI_BASE		0xfe002000
80 
81 /* MMCIF */
82 #define CONFIG_SH_MMCIF			1
83 #define CONFIG_SH_MMCIF_ADDR		0xffcb0000
84 #define CONFIG_SH_MMCIF_CLK		48000000
85 
86 /* ENV setting */
87 #define CONFIG_ENV_IS_EMBEDDED
88 #define CONFIG_ENV_IS_IN_SPI_FLASH
89 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
90 #define CONFIG_ENV_ADDR		(0x00080000)
91 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
92 #define CONFIG_ENV_OVERWRITE	1
93 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
94 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
95 #define CONFIG_EXTRA_ENV_SETTINGS				\
96 		"netboot=bootp; bootm\0"
97 
98 /* Board Clock */
99 #define CONFIG_SYS_CLK_FREQ	48000000
100 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
101 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
102 #define CONFIG_SYS_TMU_CLK_DIV	4
103 #endif	/* __SH7753EVB_H */
104