1ee4bbbcbSTom Warren /* 2ee4bbbcbSTom Warren * (C) Copyright 2010,2011 3ee4bbbcbSTom Warren * NVIDIA Corporation <www.nvidia.com> 4ee4bbbcbSTom Warren * 5ee4bbbcbSTom Warren * See file CREDITS for list of people who contributed to this 6ee4bbbcbSTom Warren * project. 7ee4bbbcbSTom Warren * 8ee4bbbcbSTom Warren * This program is free software; you can redistribute it and/or 9ee4bbbcbSTom Warren * modify it under the terms of the GNU General Public License as 10ee4bbbcbSTom Warren * published by the Free Software Foundation; either version 2 of 11ee4bbbcbSTom Warren * the License, or (at your option) any later version. 12ee4bbbcbSTom Warren * 13ee4bbbcbSTom Warren * This program is distributed in the hope that it will be useful, 14ee4bbbcbSTom Warren * but WITHOUT ANY WARRANTY; without even the implied warranty of 15ee4bbbcbSTom Warren * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16ee4bbbcbSTom Warren * GNU General Public License for more details. 17ee4bbbcbSTom Warren * 18ee4bbbcbSTom Warren * You should have received a copy of the GNU General Public License 19ee4bbbcbSTom Warren * along with this program; if not, write to the Free Software 20ee4bbbcbSTom Warren * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21ee4bbbcbSTom Warren * MA 02111-1307 USA 22ee4bbbcbSTom Warren */ 23ee4bbbcbSTom Warren 24ee4bbbcbSTom Warren #ifndef __CONFIG_H 25ee4bbbcbSTom Warren #define __CONFIG_H 26ee4bbbcbSTom Warren 27ee4bbbcbSTom Warren #include <asm/sizes.h> 28ee4bbbcbSTom Warren #include "tegra2-common.h" 29ee4bbbcbSTom Warren 30ee4bbbcbSTom Warren /* High-level configuration options */ 31ee4bbbcbSTom Warren #define TEGRA2_SYSMEM "mem=384M@0M nvmem=128M@384M mem=512M@512M" 32ee4bbbcbSTom Warren #define V_PROMPT "Tegra2 (SeaBoard) # " 33ee4bbbcbSTom Warren #define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Seaboard" 34ee4bbbcbSTom Warren 35ee4bbbcbSTom Warren /* Board-specific serial config */ 36ee4bbbcbSTom Warren #define CONFIG_SERIAL_MULTI 37ee4bbbcbSTom Warren #define CONFIG_TEGRA2_ENABLE_UARTD 38ee4bbbcbSTom Warren #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE 39ee4bbbcbSTom Warren 40bf80088aSSimon Glass /* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */ 41bf80088aSSimon Glass #define CONFIG_UART_DISABLE_GPIO GPIO_PI3 42bf80088aSSimon Glass 4305858736STom Warren #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD 44ee4bbbcbSTom Warren #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */ 45ee4bbbcbSTom Warren 4674652cf6STom Warren #define CONFIG_BOARD_EARLY_INIT_F 4783800959STom Warren 48bf80088aSSimon Glass /* SPI */ 49bf80088aSSimon Glass #define CONFIG_TEGRA2_SPI 50bf80088aSSimon Glass #define CONFIG_SPI_FLASH 51bf80088aSSimon Glass #define CONFIG_SPI_FLASH_WINBOND 52bf80088aSSimon Glass #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 53bf80088aSSimon Glass #define CONFIG_CMD_SPI 54bf80088aSSimon Glass #define CONFIG_CMD_SF 55*9dd79fdbSSimon Glass #define CONFIG_SPI_FLASH_SIZE (4 << 20) 56bf80088aSSimon Glass 5783800959STom Warren /* SD/MMC */ 5883800959STom Warren #define CONFIG_MMC 5983800959STom Warren #define CONFIG_GENERIC_MMC 6083800959STom Warren #define CONFIG_TEGRA2_MMC 6183800959STom Warren #define CONFIG_CMD_MMC 6283800959STom Warren 6383800959STom Warren #define CONFIG_DOS_PARTITION 6483800959STom Warren #define CONFIG_EFI_PARTITION 6583800959STom Warren #define CONFIG_CMD_EXT2 6683800959STom Warren #define CONFIG_CMD_FAT 67*9dd79fdbSSimon Glass 68*9dd79fdbSSimon Glass /* Environment in SPI */ 69*9dd79fdbSSimon Glass #define CONFIG_ENV_IS_IN_SPI_FLASH 70*9dd79fdbSSimon Glass #define CONFIG_ENV_SPI_MAX_HZ 48000000 71*9dd79fdbSSimon Glass #define CONFIG_ENV_SPI_MODE SPI_MODE_0 72*9dd79fdbSSimon Glass 73*9dd79fdbSSimon Glass #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 74*9dd79fdbSSimon Glass #define CONFIG_ENV_OFFSET (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE) 75ee4bbbcbSTom Warren #endif /* __CONFIG_H */ 76