1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * SPDX-License-Identifier: GPL-2.0+ 4 */ 5 6 #ifndef __CONFIG_H 7 #define __CONFIG_H 8 9 #ifdef FTRACE 10 #define CONFIG_TRACE 11 #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) 12 #define CONFIG_TRACE_EARLY_SIZE (8 << 20) 13 #define CONFIG_TRACE_EARLY 14 #define CONFIG_TRACE_EARLY_ADDR 0x00100000 15 16 #endif 17 18 #ifndef CONFIG_SPL_BUILD 19 #define CONFIG_IO_TRACE 20 #endif 21 22 #ifndef CONFIG_TIMER 23 #define CONFIG_SYS_TIMER_RATE 1000000 24 #endif 25 26 #define CONFIG_LMB 27 28 #define CONFIG_HOST_MAX_DEVICES 4 29 30 /* 31 * Size of malloc() pool, before and after relocation 32 */ 33 #define CONFIG_MALLOC_F_ADDR 0x0010000 34 #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */ 35 36 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 37 #define CONFIG_DISPLAY_BOARDINFO_LATE 38 39 /* turn on command-line edit/c/auto */ 40 41 #define CONFIG_ENV_SIZE 8192 42 43 /* SPI - enable all SPI flash types for testing purposes */ 44 45 #define CONFIG_I2C_EDID 46 47 /* Memory things - we don't really want a memory test */ 48 #define CONFIG_SYS_LOAD_ADDR 0x00000000 49 #define CONFIG_SYS_MEMTEST_START 0x00100000 50 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000) 51 #define CONFIG_SYS_FDT_LOAD_ADDR 0x100 52 53 #define CONFIG_PHYSMEM 54 55 /* Size of our emulated memory */ 56 #define CONFIG_SYS_SDRAM_BASE 0 57 #define CONFIG_SYS_SDRAM_SIZE (128 << 20) 58 #define CONFIG_SYS_MONITOR_BASE 0 59 #define CONFIG_NR_DRAM_BANKS 1 60 61 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 62 115200} 63 64 #define BOOT_TARGET_DEVICES(func) \ 65 func(HOST, host, 1) \ 66 func(HOST, host, 0) 67 68 #include <config_distro_bootcmd.h> 69 70 #define CONFIG_KEEP_SERVERADDR 71 #define CONFIG_UDP_CHECKSUM 72 #define CONFIG_TIMESTAMP 73 #define CONFIG_BOOTP_DNS2 74 #define CONFIG_BOOTP_SEND_HOSTNAME 75 #define CONFIG_BOOTP_SERVERIP 76 #define CONFIG_IP_DEFRAG 77 78 #ifndef SANDBOX_NO_SDL 79 #define CONFIG_SANDBOX_SDL 80 #endif 81 82 /* LCD and keyboard require SDL support */ 83 #ifdef CONFIG_SANDBOX_SDL 84 #define LCD_BPP LCD_COLOR16 85 #define CONFIG_LCD_BMP_RLE8 86 #define CONFIG_VIDEO_BMP_RLE8 87 #define CONFIG_SPLASH_SCREEN_ALIGN 88 89 #define CONFIG_KEYBOARD 90 91 #define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \ 92 "stdout=serial,vidconsole\0" \ 93 "stderr=serial,vidconsole\0" 94 #else 95 #define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \ 96 "stdout=serial,vidconsole\0" \ 97 "stderr=serial,vidconsole\0" 98 #endif 99 100 #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \ 101 "eth1addr=00:00:11:22:33:45\0" \ 102 "eth3addr=00:00:11:22:33:46\0" \ 103 "eth5addr=00:00:11:22:33:47\0" \ 104 "ipaddr=1.2.3.4\0" 105 106 #define MEM_LAYOUT_ENV_SETTINGS \ 107 "bootm_size=0x10000000\0" \ 108 "kernel_addr_r=0x1000000\0" \ 109 "fdt_addr_r=0xc00000\0" \ 110 "ramdisk_addr_r=0x2000000\0" \ 111 "scriptaddr=0x1000\0" \ 112 "pxefile_addr_r=0x2000\0" 113 114 #define CONFIG_EXTRA_ENV_SETTINGS \ 115 SANDBOX_SERIAL_SETTINGS \ 116 SANDBOX_ETH_SETTINGS \ 117 BOOTENV \ 118 MEM_LAYOUT_ENV_SETTINGS 119 120 #define CONFIG_GZIP_COMPRESSED 121 #define CONFIG_BZIP2 122 123 #ifndef CONFIG_SPL_BUILD 124 #define CONFIG_SYS_IDE_MAXBUS 1 125 #define CONFIG_SYS_ATA_IDE0_OFFSET 0 126 #define CONFIG_SYS_IDE_MAXDEVICE 2 127 #define CONFIG_SYS_ATA_BASE_ADDR 0x100 128 #define CONFIG_SYS_ATA_DATA_OFFSET 0 129 #define CONFIG_SYS_ATA_REG_OFFSET 1 130 #define CONFIG_SYS_ATA_ALT_OFFSET 2 131 #define CONFIG_SYS_ATA_STRIDE 4 132 #endif 133 134 #define CONFIG_SCSI_AHCI_PLAT 135 #define CONFIG_SYS_SCSI_MAX_DEVICE 2 136 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 8 137 #define CONFIG_SYS_SCSI_MAX_LUN 4 138 139 #define CONFIG_SYS_SATA_MAX_DEVICE 2 140 141 #define CONFIG_MISC_INIT_F 142 143 #endif 144