1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (c) 2011 The Chromium OS Authors. 4 */ 5 6 #ifndef __CONFIG_H 7 #define __CONFIG_H 8 9 #ifdef FTRACE 10 #define CONFIG_TRACE 11 #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) 12 #define CONFIG_TRACE_EARLY_SIZE (8 << 20) 13 #define CONFIG_TRACE_EARLY 14 #define CONFIG_TRACE_EARLY_ADDR 0x00100000 15 16 #endif 17 18 #ifndef CONFIG_SPL_BUILD 19 #define CONFIG_IO_TRACE 20 #endif 21 22 #ifndef CONFIG_TIMER 23 #define CONFIG_SYS_TIMER_RATE 1000000 24 #endif 25 26 #define CONFIG_LMB 27 28 #define CONFIG_HOST_MAX_DEVICES 4 29 30 /* 31 * Size of malloc() pool, before and after relocation 32 */ 33 #define CONFIG_MALLOC_F_ADDR 0x0010000 34 #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */ 35 36 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 37 38 /* turn on command-line edit/c/auto */ 39 40 #define CONFIG_ENV_SIZE 8192 41 42 /* SPI - enable all SPI flash types for testing purposes */ 43 44 #define CONFIG_I2C_EDID 45 46 /* Memory things - we don't really want a memory test */ 47 #define CONFIG_SYS_LOAD_ADDR 0x00000000 48 #define CONFIG_SYS_MEMTEST_START 0x00100000 49 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000) 50 #define CONFIG_SYS_FDT_LOAD_ADDR 0x100 51 52 #define CONFIG_PHYSMEM 53 54 /* Size of our emulated memory */ 55 #define CONFIG_SYS_SDRAM_BASE 0 56 #define CONFIG_SYS_SDRAM_SIZE (128 << 20) 57 #define CONFIG_SYS_MONITOR_BASE 0 58 59 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 60 115200} 61 62 #define BOOT_TARGET_DEVICES(func) \ 63 func(HOST, host, 1) \ 64 func(HOST, host, 0) 65 66 #include <config_distro_bootcmd.h> 67 68 #define CONFIG_KEEP_SERVERADDR 69 #define CONFIG_UDP_CHECKSUM 70 #define CONFIG_TIMESTAMP 71 #define CONFIG_BOOTP_DNS2 72 #define CONFIG_BOOTP_SEND_HOSTNAME 73 #define CONFIG_BOOTP_SERVERIP 74 #define CONFIG_IP_DEFRAG 75 76 #ifndef SANDBOX_NO_SDL 77 #define CONFIG_SANDBOX_SDL 78 #endif 79 80 /* LCD and keyboard require SDL support */ 81 #ifdef CONFIG_SANDBOX_SDL 82 #define LCD_BPP LCD_COLOR16 83 #define CONFIG_LCD_BMP_RLE8 84 #define CONFIG_VIDEO_BMP_RLE8 85 #define CONFIG_SPLASH_SCREEN_ALIGN 86 87 #define CONFIG_KEYBOARD 88 89 #define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \ 90 "stdout=serial,vidconsole\0" \ 91 "stderr=serial,vidconsole\0" 92 #else 93 #define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \ 94 "stdout=serial,vidconsole\0" \ 95 "stderr=serial,vidconsole\0" 96 #endif 97 98 #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \ 99 "eth1addr=00:00:11:22:33:45\0" \ 100 "eth3addr=00:00:11:22:33:46\0" \ 101 "eth5addr=00:00:11:22:33:47\0" \ 102 "ipaddr=1.2.3.4\0" 103 104 #define MEM_LAYOUT_ENV_SETTINGS \ 105 "bootm_size=0x10000000\0" \ 106 "kernel_addr_r=0x1000000\0" \ 107 "fdt_addr_r=0xc00000\0" \ 108 "ramdisk_addr_r=0x2000000\0" \ 109 "scriptaddr=0x1000\0" \ 110 "pxefile_addr_r=0x2000\0" 111 112 #define CONFIG_EXTRA_ENV_SETTINGS \ 113 SANDBOX_SERIAL_SETTINGS \ 114 SANDBOX_ETH_SETTINGS \ 115 BOOTENV \ 116 MEM_LAYOUT_ENV_SETTINGS 117 118 #define CONFIG_GZIP_COMPRESSED 119 #define CONFIG_BZIP2 120 121 #ifndef CONFIG_SPL_BUILD 122 #define CONFIG_SYS_IDE_MAXBUS 1 123 #define CONFIG_SYS_ATA_IDE0_OFFSET 0 124 #define CONFIG_SYS_IDE_MAXDEVICE 2 125 #define CONFIG_SYS_ATA_BASE_ADDR 0x100 126 #define CONFIG_SYS_ATA_DATA_OFFSET 0 127 #define CONFIG_SYS_ATA_REG_OFFSET 1 128 #define CONFIG_SYS_ATA_ALT_OFFSET 2 129 #define CONFIG_SYS_ATA_STRIDE 4 130 #endif 131 132 #define CONFIG_SCSI_AHCI_PLAT 133 #define CONFIG_SYS_SCSI_MAX_DEVICE 2 134 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 8 135 #define CONFIG_SYS_SCSI_MAX_LUN 4 136 137 #define CONFIG_SYS_SATA_MAX_DEVICE 2 138 139 #define CONFIG_MISC_INIT_F 140 141 #endif 142