1 /*
2  * Configuration settings for the SAMA5D4 Xplained ultra board.
3  *
4  * Copyright (C) 2014 Atmel
5  *		      Bo Shen <voice.shen@atmel.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #include "at91-sama5_common.h"
14 
15 #define CONFIG_MISC_INIT_R
16 
17 /* SDRAM */
18 #define CONFIG_NR_DRAM_BANKS		1
19 #define CONFIG_SYS_SDRAM_BASE           0x20000000
20 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
21 
22 #ifdef CONFIG_SPL_BUILD
23 #define CONFIG_SYS_INIT_SP_ADDR		0x218000
24 #else
25 #define CONFIG_SYS_INIT_SP_ADDR \
26 	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
27 #endif
28 
29 #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
30 
31 #ifdef CONFIG_CMD_SF
32 #define CONFIG_SF_DEFAULT_SPEED		30000000
33 #endif
34 
35 /* NAND flash */
36 #ifdef CONFIG_CMD_NAND
37 #define CONFIG_NAND_ATMEL
38 #define CONFIG_SYS_MAX_NAND_DEVICE	1
39 #define CONFIG_SYS_NAND_BASE		0x80000000
40 /* our ALE is AD21 */
41 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
42 /* our CLE is AD22 */
43 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
44 #define CONFIG_SYS_NAND_ONFI_DETECTION
45 /* PMECC & PMERRLOC */
46 #define CONFIG_ATMEL_NAND_HWECC
47 #define CONFIG_ATMEL_NAND_HW_PMECC
48 #endif
49 
50 /* SPL */
51 #define CONFIG_SPL_TEXT_BASE		0x200000
52 #define CONFIG_SPL_MAX_SIZE		0x18000
53 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
54 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
55 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
56 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
57 
58 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
59 
60 #ifdef CONFIG_SD_BOOT
61 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
62 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
63 
64 #elif CONFIG_SYS_USE_NANDFLASH
65 #elif CONFIG_SPI_BOOT
66 #define CONFIG_SPL_SPI_LOAD
67 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x10000
68 
69 #elif CONFIG_NAND_BOOT
70 #define CONFIG_SPL_NAND_DRIVERS
71 #define CONFIG_SPL_NAND_BASE
72 #endif
73 #define CONFIG_PMECC_CAP		8
74 #define CONFIG_PMECC_SECTOR_SIZE	512
75 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
76 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
77 #define CONFIG_SYS_NAND_PAGE_SIZE	0x1000
78 #define CONFIG_SYS_NAND_PAGE_COUNT	64
79 #define CONFIG_SYS_NAND_OOBSIZE		224
80 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x40000
81 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
82 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
83 
84 #endif
85