1 /*
2  * Configuration settings for the SAMA5D4 Xplained ultra board.
3  *
4  * Copyright (C) 2014 Atmel
5  *		      Bo Shen <voice.shen@atmel.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #include "at91-sama5_common.h"
14 
15 /* SDRAM */
16 #define CONFIG_NR_DRAM_BANKS		1
17 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
18 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
19 
20 #ifdef CONFIG_SPL_BUILD
21 #define CONFIG_SYS_INIT_SP_ADDR		0x218000
22 #else
23 #define CONFIG_SYS_INIT_SP_ADDR \
24 	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
25 #endif
26 
27 #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
28 
29 #ifdef CONFIG_CMD_SF
30 #define CONFIG_SF_DEFAULT_SPEED		30000000
31 #endif
32 
33 /* NAND flash */
34 #ifdef CONFIG_CMD_NAND
35 #define CONFIG_NAND_ATMEL
36 #define CONFIG_SYS_MAX_NAND_DEVICE	1
37 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
38 /* our ALE is AD21 */
39 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
40 /* our CLE is AD22 */
41 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
42 #define CONFIG_SYS_NAND_ONFI_DETECTION
43 /* PMECC & PMERRLOC */
44 #define CONFIG_ATMEL_NAND_HWECC
45 #define CONFIG_ATMEL_NAND_HW_PMECC
46 #endif
47 
48 /* LCD */
49 #ifdef CONFIG_LCD
50 #define LCD_BPP				LCD_COLOR16
51 #define LCD_OUTPUT_BPP                  24
52 #define CONFIG_LCD_LOGO
53 #define CONFIG_LCD_INFO
54 #define CONFIG_LCD_INFO_BELOW_LOGO
55 #define CONFIG_ATMEL_HLCD
56 #define CONFIG_ATMEL_LCD_RGB565
57 #endif
58 
59 #ifdef CONFIG_SYS_USE_SERIALFLASH
60 /* override the bootcmd, bootargs and other configuration for spi flash env */
61 #elif CONFIG_SYS_USE_NANDFLASH
62 /* override the bootcmd, bootargs and other configuration for nandflash env */
63 #elif CONFIG_SYS_USE_MMC
64 /* override the bootcmd, bootargs and other configuration for sd/mmc env */
65 #endif
66 
67 /* SPL */
68 #define CONFIG_SPL_FRAMEWORK
69 #define CONFIG_SPL_TEXT_BASE		0x200000
70 #define CONFIG_SPL_MAX_SIZE		0x18000
71 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
72 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
73 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
74 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
75 
76 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
77 
78 #ifdef CONFIG_SYS_USE_MMC
79 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
80 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
81 
82 #elif CONFIG_SYS_USE_NANDFLASH
83 #define CONFIG_SPL_NAND_DRIVERS
84 #define CONFIG_SPL_NAND_BASE
85 #define CONFIG_PMECC_CAP		8
86 #define CONFIG_PMECC_SECTOR_SIZE	512
87 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
88 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
89 #define CONFIG_SYS_NAND_PAGE_SIZE	0x1000
90 #define CONFIG_SYS_NAND_PAGE_COUNT	64
91 #define CONFIG_SYS_NAND_OOBSIZE		224
92 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x40000
93 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
94 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
95 
96 #elif CONFIG_SYS_USE_SERIALFLASH
97 #define CONFIG_SPL_SPI_LOAD
98 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x10000
99 
100 #endif
101 #endif
102