1 /* 2 * Configuation settings for the SAMA5D3xEK board. 3 * 4 * Copyright (C) 2012 - 2013 Atmel 5 * 6 * based on at91sam9m10g45ek.h by: 7 * Stelian Pop <stelian@popies.net> 8 * Lead Tech Design <www.leadtechdesign.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include "at91-sama5_common.h" 17 18 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 19 20 /* serial console */ 21 #define CONFIG_ATMEL_USART 22 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 23 #define CONFIG_USART_ID ATMEL_ID_DBGU 24 25 /* 26 * This needs to be defined for the OHCI code to work but it is defined as 27 * ATMEL_ID_UHPHS in the CPU specific header files. 28 */ 29 #define ATMEL_ID_UHP ATMEL_ID_UHPHS 30 31 /* 32 * Specify the clock enable bit in the PMC_SCER register. 33 */ 34 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 35 36 /* LCD */ 37 #define LCD_BPP LCD_COLOR16 38 #define LCD_OUTPUT_BPP 24 39 #define CONFIG_LCD_LOGO 40 #define CONFIG_LCD_INFO 41 #define CONFIG_LCD_INFO_BELOW_LOGO 42 #define CONFIG_SYS_WHITE_ON_BLACK 43 #define CONFIG_ATMEL_HLCD 44 #define CONFIG_ATMEL_LCD_RGB565 45 46 /* board specific (not enough SRAM) */ 47 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000 48 49 /* NOR flash */ 50 #ifdef CONFIG_MTD_NOR_FLASH 51 #define CONFIG_FLASH_CFI_DRIVER 52 #define CONFIG_SYS_FLASH_CFI 53 #define CONFIG_SYS_FLASH_PROTECTION 54 #define CONFIG_SYS_FLASH_BASE 0x10000000 55 #define CONFIG_SYS_MAX_FLASH_SECT 131 56 #define CONFIG_SYS_MAX_FLASH_BANKS 1 57 #endif 58 59 /* SDRAM */ 60 #define CONFIG_NR_DRAM_BANKS 1 61 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 62 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 63 64 #ifdef CONFIG_SPL_BUILD 65 #define CONFIG_SYS_INIT_SP_ADDR 0x310000 66 #else 67 #define CONFIG_SYS_INIT_SP_ADDR \ 68 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 69 #endif 70 71 /* SerialFlash */ 72 73 #ifdef CONFIG_CMD_SF 74 #define CONFIG_ATMEL_SPI 75 #define CONFIG_SF_DEFAULT_SPEED 30000000 76 #endif 77 78 /* NAND flash */ 79 #define CONFIG_CMD_NAND 80 81 #ifdef CONFIG_CMD_NAND 82 #define CONFIG_NAND_ATMEL 83 #define CONFIG_SYS_MAX_NAND_DEVICE 1 84 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 85 /* our ALE is AD21 */ 86 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 87 /* our CLE is AD22 */ 88 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 89 #define CONFIG_SYS_NAND_ONFI_DETECTION 90 /* PMECC & PMERRLOC */ 91 #define CONFIG_ATMEL_NAND_HWECC 92 #define CONFIG_ATMEL_NAND_HW_PMECC 93 #define CONFIG_PMECC_CAP 4 94 #define CONFIG_PMECC_SECTOR_SIZE 512 95 #define CONFIG_CMD_NAND_TRIMFFS 96 #endif 97 98 /* Ethernet Hardware */ 99 #define CONFIG_MACB 100 #define CONFIG_RMII 101 #define CONFIG_NET_RETRY_COUNT 20 102 #define CONFIG_MACB_SEARCH_PHY 103 #define CONFIG_RGMII 104 #define CONFIG_PHYLIB 105 #define CONFIG_PHY_MICREL 106 #define CONFIG_PHY_MICREL_KSZ9021 107 108 /* MMC */ 109 110 #ifdef CONFIG_CMD_MMC 111 #define CONFIG_GENERIC_ATMEL_MCI 112 #define ATMEL_BASE_MMCI ATMEL_BASE_MCI0 113 #endif 114 115 /* USB */ 116 117 #ifdef CONFIG_CMD_USB 118 #define CONFIG_USB_ATMEL 119 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 120 #define CONFIG_USB_OHCI_NEW 121 #define CONFIG_SYS_USB_OHCI_CPU_INIT 122 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 123 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3" 124 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 125 #endif 126 127 /* USB device */ 128 #define CONFIG_USB_ETHER 129 #define CONFIG_USB_ETH_RNDIS 130 #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK" 131 132 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 133 #define CONFIG_FAT_WRITE 134 #endif 135 136 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 137 138 #ifdef CONFIG_SYS_USE_SERIALFLASH 139 /* override the bootcmd, bootargs and other configuration for spi flash env*/ 140 #elif CONFIG_SYS_USE_NANDFLASH 141 /* override the bootcmd, bootargs and other configuration nandflash env */ 142 #elif CONFIG_SYS_USE_MMC 143 /* override the bootcmd, bootargs and other configuration for sd/mmc env */ 144 #else 145 #define CONFIG_ENV_IS_NOWHERE 146 #endif 147 148 /* SPL */ 149 #define CONFIG_SPL_FRAMEWORK 150 #define CONFIG_SPL_TEXT_BASE 0x300000 151 #define CONFIG_SPL_MAX_SIZE 0x10000 152 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 153 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 154 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 155 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 156 157 #define CONFIG_SPL_BOARD_INIT 158 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 159 160 #ifdef CONFIG_SYS_USE_MMC 161 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds 162 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 163 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 164 165 #elif CONFIG_SYS_USE_NANDFLASH 166 #define CONFIG_SPL_NAND_DRIVERS 167 #define CONFIG_SPL_NAND_BASE 168 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 169 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 170 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 171 #define CONFIG_SYS_NAND_PAGE_COUNT 64 172 #define CONFIG_SYS_NAND_OOBSIZE 64 173 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 174 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 175 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 176 177 #elif CONFIG_SYS_USE_SERIALFLASH 178 #define CONFIG_SPL_SPI_LOAD 179 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 180 181 #endif 182 183 #endif 184