1 /* 2 * Configuation settings for the SAMA5D3xEK board. 3 * 4 * Copyright (C) 2012 - 2013 Atmel 5 * 6 * based on at91sam9m10g45ek.h by: 7 * Stelian Pop <stelian@popies.net> 8 * Lead Tech Design <www.leadtechdesign.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 /* 17 * If has No NOR flash, please put the definition: CONFIG_SYS_NO_FLASH 18 * before the common header. 19 */ 20 #include "at91-sama5_common.h" 21 22 /* serial console */ 23 #define CONFIG_ATMEL_USART 24 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 25 #define CONFIG_USART_ID ATMEL_ID_DBGU 26 27 /* 28 * This needs to be defined for the OHCI code to work but it is defined as 29 * ATMEL_ID_UHPHS in the CPU specific header files. 30 */ 31 #define ATMEL_ID_UHP ATMEL_ID_UHPHS 32 33 /* 34 * Specify the clock enable bit in the PMC_SCER register. 35 */ 36 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 37 38 /* LCD */ 39 #define CONFIG_LCD 40 #define LCD_BPP LCD_COLOR16 41 #define LCD_OUTPUT_BPP 24 42 #define CONFIG_LCD_LOGO 43 #define CONFIG_LCD_INFO 44 #define CONFIG_LCD_INFO_BELOW_LOGO 45 #define CONFIG_SYS_WHITE_ON_BLACK 46 #define CONFIG_ATMEL_HLCD 47 #define CONFIG_ATMEL_LCD_RGB565 48 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 49 50 /* board specific (not enough SRAM) */ 51 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000 52 53 /* NOR flash */ 54 #ifndef CONFIG_SYS_NO_FLASH 55 #define CONFIG_CMD_FLASH 56 #define CONFIG_FLASH_CFI_DRIVER 57 #define CONFIG_SYS_FLASH_CFI 58 #define CONFIG_SYS_FLASH_PROTECTION 59 #define CONFIG_SYS_FLASH_BASE 0x10000000 60 #define CONFIG_SYS_MAX_FLASH_SECT 131 61 #define CONFIG_SYS_MAX_FLASH_BANKS 1 62 #endif 63 64 /* SDRAM */ 65 #define CONFIG_NR_DRAM_BANKS 1 66 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 67 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 68 69 #ifdef CONFIG_SPL_BUILD 70 #define CONFIG_SYS_INIT_SP_ADDR 0x310000 71 #else 72 #define CONFIG_SYS_INIT_SP_ADDR \ 73 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 74 #endif 75 76 /* SerialFlash */ 77 #define CONFIG_CMD_SF 78 79 #ifdef CONFIG_CMD_SF 80 #define CONFIG_ATMEL_SPI 81 #define CONFIG_SPI_FLASH_ATMEL 82 #define CONFIG_SF_DEFAULT_SPEED 30000000 83 #endif 84 85 /* NAND flash */ 86 #define CONFIG_CMD_NAND 87 88 #ifdef CONFIG_CMD_NAND 89 #define CONFIG_NAND_ATMEL 90 #define CONFIG_SYS_MAX_NAND_DEVICE 1 91 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 92 /* our ALE is AD21 */ 93 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 94 /* our CLE is AD22 */ 95 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 96 #define CONFIG_SYS_NAND_ONFI_DETECTION 97 /* PMECC & PMERRLOC */ 98 #define CONFIG_ATMEL_NAND_HWECC 99 #define CONFIG_ATMEL_NAND_HW_PMECC 100 #define CONFIG_PMECC_CAP 4 101 #define CONFIG_PMECC_SECTOR_SIZE 512 102 #define CONFIG_CMD_NAND_TRIMFFS 103 #endif 104 105 /* Ethernet Hardware */ 106 #define CONFIG_MACB 107 #define CONFIG_RMII 108 #define CONFIG_NET_RETRY_COUNT 20 109 #define CONFIG_MACB_SEARCH_PHY 110 #define CONFIG_RGMII 111 #define CONFIG_CMD_MII 112 #define CONFIG_PHYLIB 113 #define CONFIG_PHY_MICREL 114 #define CONFIG_PHY_MICREL_KSZ9021 115 116 /* MMC */ 117 #define CONFIG_CMD_MMC 118 119 #ifdef CONFIG_CMD_MMC 120 #define CONFIG_MMC 121 #define CONFIG_GENERIC_MMC 122 #define CONFIG_GENERIC_ATMEL_MCI 123 #define ATMEL_BASE_MMCI ATMEL_BASE_MCI0 124 #endif 125 126 /* USB */ 127 #define CONFIG_CMD_USB 128 129 #ifdef CONFIG_CMD_USB 130 #define CONFIG_USB_ATMEL 131 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 132 #define CONFIG_USB_OHCI_NEW 133 #define CONFIG_SYS_USB_OHCI_CPU_INIT 134 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 135 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3" 136 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 137 #define CONFIG_DOS_PARTITION 138 #define CONFIG_USB_STORAGE 139 #endif 140 141 /* USB device */ 142 #define CONFIG_USB_GADGET 143 #define CONFIG_USB_GADGET_DUALSPEED 144 #define CONFIG_USB_GADGET_ATMEL_USBA 145 #define CONFIG_USB_ETHER 146 #define CONFIG_USB_ETH_RNDIS 147 #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK" 148 149 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 150 #define CONFIG_CMD_FAT 151 #define CONFIG_FAT_WRITE 152 #endif 153 154 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 155 156 #ifdef CONFIG_SYS_USE_SERIALFLASH 157 /* bootstrap + u-boot + env + linux in serial flash */ 158 #define CONFIG_ENV_IS_IN_SPI_FLASH 159 #define CONFIG_ENV_OFFSET 0x5000 160 #define CONFIG_ENV_SIZE 0x3000 161 #define CONFIG_ENV_SECT_SIZE 0x1000 162 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 163 "sf read 0x22000000 0x42000 0x300000; " \ 164 "bootm 0x22000000" 165 #elif CONFIG_SYS_USE_NANDFLASH 166 /* bootstrap + u-boot + env in nandflash */ 167 #define CONFIG_ENV_IS_IN_NAND 168 #define CONFIG_ENV_OFFSET 0xc0000 169 #define CONFIG_ENV_OFFSET_REDUND 0x100000 170 #define CONFIG_ENV_SIZE 0x20000 171 #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \ 172 "nand read 0x22000000 0x200000 0x600000;" \ 173 "bootm 0x22000000 - 0x21000000" 174 #elif CONFIG_SYS_USE_MMC 175 /* bootstrap + u-boot + env in sd card */ 176 #define CONFIG_ENV_IS_IN_FAT 177 #define FAT_ENV_INTERFACE "mmc" 178 #define FAT_ENV_FILE "uboot.env" 179 #define FAT_ENV_DEVICE_AND_PART "0" 180 #define CONFIG_ENV_SIZE 0x4000 181 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \ 182 "fatload mmc 0:1 0x22000000 uImage; " \ 183 "bootm 0x22000000 - 0x21000000" 184 #else 185 #define CONFIG_ENV_IS_NOWHERE 186 #endif 187 188 /* SPL */ 189 #define CONFIG_SPL_FRAMEWORK 190 #define CONFIG_SPL_TEXT_BASE 0x300000 191 #define CONFIG_SPL_MAX_SIZE 0x10000 192 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 193 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 194 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 195 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 196 197 #define CONFIG_SPL_LIBCOMMON_SUPPORT 198 #define CONFIG_SPL_LIBGENERIC_SUPPORT 199 #define CONFIG_SPL_GPIO_SUPPORT 200 #define CONFIG_SPL_SERIAL_SUPPORT 201 202 #define CONFIG_SPL_BOARD_INIT 203 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 204 205 #ifdef CONFIG_SYS_USE_MMC 206 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds 207 #define CONFIG_SPL_MMC_SUPPORT 208 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 209 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 210 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 211 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 212 #define CONFIG_SPL_FAT_SUPPORT 213 #define CONFIG_SPL_LIBDISK_SUPPORT 214 215 #elif CONFIG_SYS_USE_NANDFLASH 216 #define CONFIG_SPL_NAND_SUPPORT 217 #define CONFIG_SPL_NAND_DRIVERS 218 #define CONFIG_SPL_NAND_BASE 219 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 220 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 221 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 222 #define CONFIG_SYS_NAND_PAGE_COUNT 64 223 #define CONFIG_SYS_NAND_OOBSIZE 64 224 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 225 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 226 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 227 228 #elif CONFIG_SYS_USE_SERIALFLASH 229 #define CONFIG_SPL_SPI_SUPPORT 230 #define CONFIG_SPL_SPI_FLASH_SUPPORT 231 #define CONFIG_SPL_SPI_LOAD 232 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 233 234 #endif 235 236 #endif 237