1 /* 2 * Configuation settings for the SAMA5D3xEK board. 3 * 4 * Copyright (C) 2012 - 2013 Atmel 5 * 6 * based on at91sam9m10g45ek.h by: 7 * Stelian Pop <stelian@popies.net> 8 * Lead Tech Design <www.leadtechdesign.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 /* 17 * If has No NOR flash, please put the definition: CONFIG_SYS_NO_FLASH 18 * before the common header. 19 */ 20 #include "at91-sama5_common.h" 21 22 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 23 24 /* serial console */ 25 #define CONFIG_ATMEL_USART 26 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 27 #define CONFIG_USART_ID ATMEL_ID_DBGU 28 29 /* 30 * This needs to be defined for the OHCI code to work but it is defined as 31 * ATMEL_ID_UHPHS in the CPU specific header files. 32 */ 33 #define ATMEL_ID_UHP ATMEL_ID_UHPHS 34 35 /* 36 * Specify the clock enable bit in the PMC_SCER register. 37 */ 38 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 39 40 /* LCD */ 41 #define LCD_BPP LCD_COLOR16 42 #define LCD_OUTPUT_BPP 24 43 #define CONFIG_LCD_LOGO 44 #define CONFIG_LCD_INFO 45 #define CONFIG_LCD_INFO_BELOW_LOGO 46 #define CONFIG_SYS_WHITE_ON_BLACK 47 #define CONFIG_ATMEL_HLCD 48 #define CONFIG_ATMEL_LCD_RGB565 49 50 /* board specific (not enough SRAM) */ 51 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000 52 53 /* NOR flash */ 54 #ifndef CONFIG_SYS_NO_FLASH 55 #define CONFIG_FLASH_CFI_DRIVER 56 #define CONFIG_SYS_FLASH_CFI 57 #define CONFIG_SYS_FLASH_PROTECTION 58 #define CONFIG_SYS_FLASH_BASE 0x10000000 59 #define CONFIG_SYS_MAX_FLASH_SECT 131 60 #define CONFIG_SYS_MAX_FLASH_BANKS 1 61 #endif 62 63 /* SDRAM */ 64 #define CONFIG_NR_DRAM_BANKS 1 65 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 66 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 67 68 #ifdef CONFIG_SPL_BUILD 69 #define CONFIG_SYS_INIT_SP_ADDR 0x310000 70 #else 71 #define CONFIG_SYS_INIT_SP_ADDR \ 72 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 73 #endif 74 75 /* SerialFlash */ 76 77 #ifdef CONFIG_CMD_SF 78 #define CONFIG_ATMEL_SPI 79 #define CONFIG_SF_DEFAULT_SPEED 30000000 80 #endif 81 82 /* NAND flash */ 83 #define CONFIG_CMD_NAND 84 85 #ifdef CONFIG_CMD_NAND 86 #define CONFIG_NAND_ATMEL 87 #define CONFIG_SYS_MAX_NAND_DEVICE 1 88 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 89 /* our ALE is AD21 */ 90 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 91 /* our CLE is AD22 */ 92 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 93 #define CONFIG_SYS_NAND_ONFI_DETECTION 94 /* PMECC & PMERRLOC */ 95 #define CONFIG_ATMEL_NAND_HWECC 96 #define CONFIG_ATMEL_NAND_HW_PMECC 97 #define CONFIG_PMECC_CAP 4 98 #define CONFIG_PMECC_SECTOR_SIZE 512 99 #define CONFIG_CMD_NAND_TRIMFFS 100 #endif 101 102 /* Ethernet Hardware */ 103 #define CONFIG_MACB 104 #define CONFIG_RMII 105 #define CONFIG_NET_RETRY_COUNT 20 106 #define CONFIG_MACB_SEARCH_PHY 107 #define CONFIG_RGMII 108 #define CONFIG_PHYLIB 109 #define CONFIG_PHY_MICREL 110 #define CONFIG_PHY_MICREL_KSZ9021 111 112 /* MMC */ 113 114 #ifdef CONFIG_CMD_MMC 115 #define CONFIG_GENERIC_ATMEL_MCI 116 #define ATMEL_BASE_MMCI ATMEL_BASE_MCI0 117 #endif 118 119 /* USB */ 120 121 #ifdef CONFIG_CMD_USB 122 #define CONFIG_USB_ATMEL 123 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 124 #define CONFIG_USB_OHCI_NEW 125 #define CONFIG_SYS_USB_OHCI_CPU_INIT 126 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 127 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3" 128 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 129 #endif 130 131 /* USB device */ 132 #define CONFIG_USB_ETHER 133 #define CONFIG_USB_ETH_RNDIS 134 #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK" 135 136 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 137 #define CONFIG_FAT_WRITE 138 #endif 139 140 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 141 142 #ifdef CONFIG_SYS_USE_SERIALFLASH 143 /* override the bootcmd, bootargs and other configuration for spi flash env*/ 144 #elif CONFIG_SYS_USE_NANDFLASH 145 /* override the bootcmd, bootargs and other configuration nandflash env */ 146 #elif CONFIG_SYS_USE_MMC 147 /* override the bootcmd, bootargs and other configuration for sd/mmc env */ 148 #else 149 #define CONFIG_ENV_IS_NOWHERE 150 #endif 151 152 /* SPL */ 153 #define CONFIG_SPL_FRAMEWORK 154 #define CONFIG_SPL_TEXT_BASE 0x300000 155 #define CONFIG_SPL_MAX_SIZE 0x10000 156 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 157 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 158 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 159 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 160 161 #define CONFIG_SPL_BOARD_INIT 162 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 163 164 #ifdef CONFIG_SYS_USE_MMC 165 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds 166 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 167 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 168 169 #elif CONFIG_SYS_USE_NANDFLASH 170 #define CONFIG_SPL_NAND_DRIVERS 171 #define CONFIG_SPL_NAND_BASE 172 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 173 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 174 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 175 #define CONFIG_SYS_NAND_PAGE_COUNT 64 176 #define CONFIG_SYS_NAND_OOBSIZE 64 177 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 178 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 179 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 180 181 #elif CONFIG_SYS_USE_SERIALFLASH 182 #define CONFIG_SPL_SPI_LOAD 183 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 184 185 #endif 186 187 #endif 188