1 /* 2 * Configuation settings for the SAMA5D3xEK board. 3 * 4 * Copyright (C) 2012 - 2013 Atmel 5 * 6 * based on at91sam9m10g45ek.h by: 7 * Stelian Pop <stelian@popies.net> 8 * Lead Tech Design <www.leadtechdesign.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/hardware.h> 17 18 #define CONFIG_SYS_TEXT_BASE 0x26f00000 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 22 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 23 24 #define CONFIG_ARCH_CPU_INIT 25 26 #ifndef CONFIG_SPL_BUILD 27 #define CONFIG_SKIP_LOWLEVEL_INIT 28 #endif 29 30 #define CONFIG_BOARD_EARLY_INIT_F 31 #define CONFIG_DISPLAY_CPUINFO 32 33 #define CONFIG_CMD_BOOTZ 34 #define CONFIG_OF_LIBFDT /* Device Tree support */ 35 36 #define CONFIG_SYS_GENERIC_BOARD 37 38 /* general purpose I/O */ 39 #define CONFIG_AT91_GPIO 40 41 /* serial console */ 42 #define CONFIG_ATMEL_USART 43 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 44 #define CONFIG_USART_ID ATMEL_ID_DBGU 45 46 /* 47 * This needs to be defined for the OHCI code to work but it is defined as 48 * ATMEL_ID_UHPHS in the CPU specific header files. 49 */ 50 #define ATMEL_ID_UHP ATMEL_ID_UHPHS 51 52 /* 53 * Specify the clock enable bit in the PMC_SCER register. 54 */ 55 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 56 57 /* LCD */ 58 #define CONFIG_LCD 59 #define LCD_BPP LCD_COLOR16 60 #define LCD_OUTPUT_BPP 24 61 #define CONFIG_LCD_LOGO 62 #define CONFIG_LCD_INFO 63 #define CONFIG_LCD_INFO_BELOW_LOGO 64 #define CONFIG_SYS_WHITE_ON_BLACK 65 #define CONFIG_ATMEL_HLCD 66 #define CONFIG_ATMEL_LCD_RGB565 67 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 68 69 /* board specific (not enough SRAM) */ 70 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000 71 72 #define CONFIG_BOOTDELAY 3 73 74 /* 75 * BOOTP options 76 */ 77 #define CONFIG_BOOTP_BOOTFILESIZE 78 #define CONFIG_BOOTP_BOOTPATH 79 #define CONFIG_BOOTP_GATEWAY 80 #define CONFIG_BOOTP_HOSTNAME 81 82 /* NOR flash */ 83 #define CONFIG_CMD_FLASH 84 85 #ifdef CONFIG_CMD_FLASH 86 #define CONFIG_FLASH_CFI_DRIVER 87 #define CONFIG_SYS_FLASH_CFI 88 #define CONFIG_SYS_FLASH_PROTECTION 89 #define CONFIG_SYS_FLASH_BASE 0x10000000 90 #define CONFIG_SYS_MAX_FLASH_SECT 131 91 #define CONFIG_SYS_MAX_FLASH_BANKS 1 92 #else 93 #define CONFIG_SYS_NO_FLASH 94 #endif 95 96 /* 97 * Command line configuration. 98 */ 99 #include <config_cmd_default.h> 100 #undef CONFIG_CMD_FPGA 101 #undef CONFIG_CMD_IMI 102 #undef CONFIG_CMD_LOADS 103 #define CONFIG_CMD_PING 104 #define CONFIG_CMD_DHCP 105 106 /* SDRAM */ 107 #define CONFIG_NR_DRAM_BANKS 1 108 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 109 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 110 111 #ifdef CONFIG_SPL_BUILD 112 #define CONFIG_SYS_INIT_SP_ADDR 0x310000 113 #else 114 #define CONFIG_SYS_INIT_SP_ADDR \ 115 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 116 #endif 117 118 /* SerialFlash */ 119 #define CONFIG_CMD_SF 120 121 #ifdef CONFIG_CMD_SF 122 #define CONFIG_ATMEL_SPI 123 #define CONFIG_SPI_FLASH 124 #define CONFIG_SPI_FLASH_ATMEL 125 #define CONFIG_SF_DEFAULT_SPEED 30000000 126 #endif 127 128 /* NAND flash */ 129 #define CONFIG_CMD_NAND 130 131 #ifdef CONFIG_CMD_NAND 132 #define CONFIG_NAND_ATMEL 133 #define CONFIG_SYS_MAX_NAND_DEVICE 1 134 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 135 /* our ALE is AD21 */ 136 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 137 /* our CLE is AD22 */ 138 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 139 #define CONFIG_SYS_NAND_ONFI_DETECTION 140 /* PMECC & PMERRLOC */ 141 #define CONFIG_ATMEL_NAND_HWECC 142 #define CONFIG_ATMEL_NAND_HW_PMECC 143 #define CONFIG_PMECC_CAP 4 144 #define CONFIG_PMECC_SECTOR_SIZE 512 145 #define CONFIG_CMD_NAND_TRIMFFS 146 #endif 147 148 /* Ethernet Hardware */ 149 #define CONFIG_MACB 150 #define CONFIG_RMII 151 #define CONFIG_NET_RETRY_COUNT 20 152 #define CONFIG_MACB_SEARCH_PHY 153 #define CONFIG_RGMII 154 #define CONFIG_CMD_MII 155 #define CONFIG_PHYLIB 156 #define CONFIG_PHY_MICREL 157 #define CONFIG_PHY_MICREL_KSZ9021 158 159 /* MMC */ 160 #define CONFIG_CMD_MMC 161 162 #ifdef CONFIG_CMD_MMC 163 #define CONFIG_MMC 164 #define CONFIG_GENERIC_MMC 165 #define CONFIG_GENERIC_ATMEL_MCI 166 #define ATMEL_BASE_MMCI ATMEL_BASE_MCI0 167 #endif 168 169 /* USB */ 170 #define CONFIG_CMD_USB 171 172 #ifdef CONFIG_CMD_USB 173 #define CONFIG_USB_ATMEL 174 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 175 #define CONFIG_USB_OHCI_NEW 176 #define CONFIG_SYS_USB_OHCI_CPU_INIT 177 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 178 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3" 179 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 180 #define CONFIG_DOS_PARTITION 181 #define CONFIG_USB_STORAGE 182 #endif 183 184 /* USB device */ 185 #define CONFIG_USB_GADGET 186 #define CONFIG_USB_GADGET_DUALSPEED 187 #define CONFIG_USB_GADGET_ATMEL_USBA 188 #define CONFIG_USB_ETHER 189 #define CONFIG_USB_ETH_RNDIS 190 #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK" 191 192 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 193 #define CONFIG_CMD_FAT 194 #define CONFIG_FAT_WRITE 195 #endif 196 197 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 198 199 #ifdef CONFIG_SYS_USE_SERIALFLASH 200 /* bootstrap + u-boot + env + linux in serial flash */ 201 #define CONFIG_ENV_IS_IN_SPI_FLASH 202 #define CONFIG_ENV_OFFSET 0x5000 203 #define CONFIG_ENV_SIZE 0x3000 204 #define CONFIG_ENV_SECT_SIZE 0x1000 205 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 206 "sf read 0x22000000 0x42000 0x300000; " \ 207 "bootm 0x22000000" 208 #elif CONFIG_SYS_USE_NANDFLASH 209 /* bootstrap + u-boot + env in nandflash */ 210 #define CONFIG_ENV_IS_IN_NAND 211 #define CONFIG_ENV_OFFSET 0xc0000 212 #define CONFIG_ENV_OFFSET_REDUND 0x100000 213 #define CONFIG_ENV_SIZE 0x20000 214 #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \ 215 "nand read 0x22000000 0x200000 0x600000;" \ 216 "bootm 0x22000000 - 0x21000000" 217 #elif CONFIG_SYS_USE_MMC 218 /* bootstrap + u-boot + env in sd card */ 219 #define CONFIG_ENV_IS_IN_FAT 220 #define FAT_ENV_INTERFACE "mmc" 221 #define FAT_ENV_FILE "uboot.env" 222 #define FAT_ENV_DEVICE_AND_PART "0" 223 #define CONFIG_ENV_SIZE 0x4000 224 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \ 225 "fatload mmc 0:1 0x22000000 uImage; " \ 226 "bootm 0x22000000 - 0x21000000" 227 #else 228 #define CONFIG_ENV_IS_NOWHERE 229 #endif 230 231 #ifdef CONFIG_SYS_USE_MMC 232 #define CONFIG_BOOTARGS \ 233 "console=ttyS0,115200 earlyprintk " \ 234 "root=/dev/mmcblk0p2 rw rootwait" 235 #else 236 #define CONFIG_BOOTARGS \ 237 "console=ttyS0,115200 earlyprintk " \ 238 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 239 "256K(env),256k(evn_redundent),256k(spare)," \ 240 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 241 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" 242 #endif 243 244 #define CONFIG_BAUDRATE 115200 245 246 #define CONFIG_SYS_PROMPT "U-Boot> " 247 #define CONFIG_SYS_CBSIZE 256 248 #define CONFIG_SYS_MAXARGS 16 249 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 250 sizeof(CONFIG_SYS_PROMPT) + 16) 251 #define CONFIG_SYS_LONGHELP 252 #define CONFIG_CMDLINE_EDITING 253 #define CONFIG_AUTO_COMPLETE 254 #define CONFIG_SYS_HUSH_PARSER 255 256 /* Size of malloc() pool */ 257 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) 258 259 /* SPL */ 260 #define CONFIG_SPL_FRAMEWORK 261 #define CONFIG_SPL_TEXT_BASE 0x300000 262 #define CONFIG_SPL_MAX_SIZE 0x10000 263 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 264 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 265 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 266 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 267 268 #define CONFIG_SPL_LIBCOMMON_SUPPORT 269 #define CONFIG_SPL_LIBGENERIC_SUPPORT 270 #define CONFIG_SPL_GPIO_SUPPORT 271 #define CONFIG_SPL_SERIAL_SUPPORT 272 273 #define CONFIG_SPL_BOARD_INIT 274 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 275 276 #ifdef CONFIG_SYS_USE_MMC 277 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds 278 #define CONFIG_SPL_MMC_SUPPORT 279 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 280 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 281 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 282 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 283 #define CONFIG_SPL_FAT_SUPPORT 284 #define CONFIG_SPL_LIBDISK_SUPPORT 285 286 #elif CONFIG_SYS_USE_NANDFLASH 287 #define CONFIG_SPL_NAND_SUPPORT 288 #define CONFIG_SPL_NAND_DRIVERS 289 #define CONFIG_SPL_NAND_BASE 290 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 291 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 292 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 293 #define CONFIG_SYS_NAND_PAGE_COUNT 64 294 #define CONFIG_SYS_NAND_OOBSIZE 64 295 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 296 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 297 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 298 299 #elif CONFIG_SYS_USE_SERIALFLASH 300 #define CONFIG_SPL_SPI_SUPPORT 301 #define CONFIG_SPL_SPI_FLASH_SUPPORT 302 #define CONFIG_SPL_SPI_LOAD 303 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 304 305 #endif 306 307 #endif 308