1 /* 2 * Configuation settings for the SAMA5D3xEK board. 3 * 4 * Copyright (C) 2012 - 2013 Atmel 5 * 6 * based on at91sam9m10g45ek.h by: 7 * Stelian Pop <stelian@popies.net> 8 * Lead Tech Design <www.leadtechdesign.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 /* 17 * If has No NOR flash, please put the definition: CONFIG_SYS_NO_FLASH 18 * before the common header. 19 */ 20 #include "at91-sama5_common.h" 21 22 #define CONFIG_BOARD_LATE_INIT 23 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 24 25 /* serial console */ 26 #define CONFIG_ATMEL_USART 27 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 28 #define CONFIG_USART_ID ATMEL_ID_DBGU 29 30 /* 31 * This needs to be defined for the OHCI code to work but it is defined as 32 * ATMEL_ID_UHPHS in the CPU specific header files. 33 */ 34 #define ATMEL_ID_UHP ATMEL_ID_UHPHS 35 36 /* 37 * Specify the clock enable bit in the PMC_SCER register. 38 */ 39 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 40 41 /* LCD */ 42 #define LCD_BPP LCD_COLOR16 43 #define LCD_OUTPUT_BPP 24 44 #define CONFIG_LCD_LOGO 45 #define CONFIG_LCD_INFO 46 #define CONFIG_LCD_INFO_BELOW_LOGO 47 #define CONFIG_SYS_WHITE_ON_BLACK 48 #define CONFIG_ATMEL_HLCD 49 #define CONFIG_ATMEL_LCD_RGB565 50 51 /* board specific (not enough SRAM) */ 52 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000 53 54 /* NOR flash */ 55 #ifndef CONFIG_SYS_NO_FLASH 56 #define CONFIG_FLASH_CFI_DRIVER 57 #define CONFIG_SYS_FLASH_CFI 58 #define CONFIG_SYS_FLASH_PROTECTION 59 #define CONFIG_SYS_FLASH_BASE 0x10000000 60 #define CONFIG_SYS_MAX_FLASH_SECT 131 61 #define CONFIG_SYS_MAX_FLASH_BANKS 1 62 #endif 63 64 /* SDRAM */ 65 #define CONFIG_NR_DRAM_BANKS 1 66 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 67 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 68 69 #ifdef CONFIG_SPL_BUILD 70 #define CONFIG_SYS_INIT_SP_ADDR 0x310000 71 #else 72 #define CONFIG_SYS_INIT_SP_ADDR \ 73 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 74 #endif 75 76 /* SerialFlash */ 77 78 #ifdef CONFIG_CMD_SF 79 #define CONFIG_ATMEL_SPI 80 #define CONFIG_SF_DEFAULT_SPEED 30000000 81 #endif 82 83 /* NAND flash */ 84 #define CONFIG_CMD_NAND 85 86 #ifdef CONFIG_CMD_NAND 87 #define CONFIG_NAND_ATMEL 88 #define CONFIG_SYS_MAX_NAND_DEVICE 1 89 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 90 /* our ALE is AD21 */ 91 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 92 /* our CLE is AD22 */ 93 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 94 #define CONFIG_SYS_NAND_ONFI_DETECTION 95 /* PMECC & PMERRLOC */ 96 #define CONFIG_ATMEL_NAND_HWECC 97 #define CONFIG_ATMEL_NAND_HW_PMECC 98 #define CONFIG_PMECC_CAP 4 99 #define CONFIG_PMECC_SECTOR_SIZE 512 100 #define CONFIG_CMD_NAND_TRIMFFS 101 #endif 102 103 /* Ethernet Hardware */ 104 #define CONFIG_MACB 105 #define CONFIG_RMII 106 #define CONFIG_NET_RETRY_COUNT 20 107 #define CONFIG_MACB_SEARCH_PHY 108 #define CONFIG_RGMII 109 #define CONFIG_PHYLIB 110 #define CONFIG_PHY_MICREL 111 #define CONFIG_PHY_MICREL_KSZ9021 112 113 /* MMC */ 114 115 #ifdef CONFIG_CMD_MMC 116 #define CONFIG_MMC 117 #define CONFIG_GENERIC_MMC 118 #define CONFIG_GENERIC_ATMEL_MCI 119 #define ATMEL_BASE_MMCI ATMEL_BASE_MCI0 120 #endif 121 122 /* USB */ 123 124 #ifdef CONFIG_CMD_USB 125 #define CONFIG_USB_ATMEL 126 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 127 #define CONFIG_USB_OHCI_NEW 128 #define CONFIG_SYS_USB_OHCI_CPU_INIT 129 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 130 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3" 131 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 132 #define CONFIG_DOS_PARTITION 133 #endif 134 135 /* USB device */ 136 #define CONFIG_USB_ETHER 137 #define CONFIG_USB_ETH_RNDIS 138 #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK" 139 140 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 141 #define CONFIG_FAT_WRITE 142 #endif 143 144 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 145 146 #ifdef CONFIG_SYS_USE_SERIALFLASH 147 /* override the bootcmd, bootargs and other configuration for spi flash env*/ 148 #elif CONFIG_SYS_USE_NANDFLASH 149 /* override the bootcmd, bootargs and other configuration nandflash env */ 150 #elif CONFIG_SYS_USE_MMC 151 /* override the bootcmd, bootargs and other configuration for sd/mmc env */ 152 #else 153 #define CONFIG_ENV_IS_NOWHERE 154 #endif 155 156 /* SPL */ 157 #define CONFIG_SPL_FRAMEWORK 158 #define CONFIG_SPL_TEXT_BASE 0x300000 159 #define CONFIG_SPL_MAX_SIZE 0x10000 160 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 161 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 162 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 163 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 164 165 #define CONFIG_SPL_BOARD_INIT 166 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 167 168 #ifdef CONFIG_SYS_USE_MMC 169 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds 170 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 171 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 172 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 173 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 174 175 #elif CONFIG_SYS_USE_NANDFLASH 176 #define CONFIG_SPL_NAND_DRIVERS 177 #define CONFIG_SPL_NAND_BASE 178 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 179 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 180 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 181 #define CONFIG_SYS_NAND_PAGE_COUNT 64 182 #define CONFIG_SYS_NAND_OOBSIZE 64 183 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 184 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 185 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 186 187 #elif CONFIG_SYS_USE_SERIALFLASH 188 #define CONFIG_SPL_SPI_LOAD 189 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 190 191 #endif 192 193 #endif 194