1 /*
2  * Configuration settings for the SAMA5D3 Xplained board.
3  *
4  * Copyright (C) 2014 Atmel Corporation
5  *		      Bo Shen <voice.shen@atmel.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #include <asm/hardware.h>
14 
15 #define CONFIG_SYS_TEXT_BASE		0x26f00000
16 
17 /* ARM asynchronous clock */
18 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
19 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
20 #define CONFIG_SYS_HZ		        1000
21 
22 #define CONFIG_AT91FAMILY
23 #define CONFIG_ARCH_CPU_INIT
24 #define CONFIG_SKIP_LOWLEVEL_INIT
25 #define CONFIG_BOARD_EARLY_INIT_F
26 #define CONFIG_DISPLAY_CPUINFO
27 
28 #define CONFIG_CMD_BOOTZ
29 #define CONFIG_OF_LIBFDT		/* Device Tree support */
30 
31 /* general purpose I/O */
32 #define CONFIG_AT91_GPIO
33 
34 /* serial console */
35 #define CONFIG_ATMEL_USART
36 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
37 #define CONFIG_USART_ID			ATMEL_ID_DBGU
38 
39 /*
40  * This needs to be defined for the OHCI code to work but it is defined as
41  * ATMEL_ID_UHPHS in the CPU specific header files.
42  */
43 #define ATMEL_ID_UHP			ATMEL_ID_UHPHS
44 
45 /*
46  * Specify the clock enable bit in the PMC_SCER register.
47  */
48 #define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
49 
50 #define CONFIG_BOOTDELAY		3
51 
52 /*
53  * BOOTP options
54  */
55 #define CONFIG_BOOTP_BOOTFILESIZE
56 #define CONFIG_BOOTP_BOOTPATH
57 #define CONFIG_BOOTP_GATEWAY
58 #define CONFIG_BOOTP_HOSTNAME
59 
60 /* No NOR flash */
61 #define CONFIG_SYS_NO_FLASH
62 
63 /*
64  * Command line configuration.
65  */
66 #include <config_cmd_default.h>
67 #undef CONFIG_CMD_FPGA
68 #undef CONFIG_CMD_IMI
69 #undef CONFIG_CMD_LOADS
70 #define CONFIG_CMD_PING
71 #define CONFIG_CMD_DHCP
72 
73 /* SDRAM */
74 #define CONFIG_NR_DRAM_BANKS		1
75 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
76 #define CONFIG_SYS_SDRAM_SIZE		0x10000000
77 
78 #define CONFIG_SYS_INIT_SP_ADDR \
79 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
80 
81 /* NAND flash */
82 #define CONFIG_CMD_NAND
83 
84 #ifdef CONFIG_CMD_NAND
85 #define CONFIG_NAND_ATMEL
86 #define CONFIG_SYS_MAX_NAND_DEVICE	1
87 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
88 /* our ALE is AD21 */
89 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
90 /* our CLE is AD22 */
91 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
92 #define CONFIG_SYS_NAND_ONFI_DETECTION
93 /* PMECC & PMERRLOC */
94 #define CONFIG_ATMEL_NAND_HWECC
95 #define CONFIG_ATMEL_NAND_HW_PMECC
96 #define CONFIG_PMECC_CAP		4
97 #define CONFIG_PMECC_SECTOR_SIZE	512
98 #define CONFIG_CMD_NAND_TRIMFFS
99 #define CONFIG_CMD_MTDPARTS
100 
101 #define CONFIG_MTD_DEVICE
102 #define CONFIG_MTD_PARTITIONS
103 #define CONFIG_RBTREE
104 #define CONFIG_LZO
105 #define CONFIG_CMD_UBI
106 #define CONFIG_CMD_UBIFS
107 #endif
108 
109 /* Ethernet Hardware */
110 #define CONFIG_MACB
111 #define CONFIG_RMII
112 #define CONFIG_NET_MULTI
113 #define CONFIG_NET_RETRY_COUNT		20
114 #define CONFIG_MACB_SEARCH_PHY
115 #define CONFIG_RGMII
116 #define CONFIG_CMD_MII
117 #define CONFIG_PHYLIB
118 
119 /* MMC */
120 #define CONFIG_CMD_MMC
121 
122 #ifdef CONFIG_CMD_MMC
123 #define CONFIG_MMC
124 #define CONFIG_GENERIC_MMC
125 #define CONFIG_GENERIC_ATMEL_MCI
126 #define CONFIG_ATMEL_MCI_8BIT
127 #endif
128 
129 /* USB */
130 #define CONFIG_CMD_USB
131 
132 #ifdef CONFIG_CMD_USB
133 #define CONFIG_USB_ATMEL
134 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
135 #define CONFIG_USB_OHCI_NEW
136 #define CONFIG_SYS_USB_OHCI_CPU_INIT
137 #define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
138 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"SAMA5D3 Xplained"
139 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
140 #define CONFIG_DOS_PARTITION
141 #define CONFIG_USB_STORAGE
142 #endif
143 
144 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
145 #define CONFIG_CMD_FAT
146 #define CONFIG_FAT_WRITE
147 #define CONFIG_CMD_EXT4
148 #define CONFIG_CMD_EXT4_WRITE
149 #endif
150 
151 #define CONFIG_SYS_LOAD_ADDR			0x22000000 /* load address */
152 
153 #if CONFIG_SYS_USE_NANDFLASH
154 /* bootstrap + u-boot + env in nandflash */
155 #define CONFIG_ENV_IS_IN_NAND
156 #define CONFIG_ENV_OFFSET		0xc0000
157 #define CONFIG_ENV_OFFSET_REDUND	0x100000
158 #define CONFIG_ENV_SIZE			0x20000
159 #define CONFIG_BOOTCOMMAND	"nand read 0x21000000 0x180000 0x80000;" \
160 				"nand read 0x22000000 0x200000 0x600000;" \
161 				"bootz 0x22000000 - 0x21000000"
162 #elif CONFIG_SYS_USE_MMC
163 /* bootstrap + u-boot + env in sd card */
164 #define CONFIG_ENV_IS_IN_MMC
165 #define CONFIG_ENV_OFFSET	0x2000
166 #define CONFIG_ENV_SIZE		0x1000
167 #define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 at91-sama5d3_xplained.dtb; " \
168 				"fatload mmc 0:1 0x22000000 zImage; " \
169 				"bootz 0x22000000 - 0x21000000"
170 #define CONFIG_SYS_MMC_ENV_DEV	0
171 #else
172 #define CONFIG_ENV_IS_NOWHERE
173 #endif
174 
175 #ifdef CONFIG_SYS_USE_MMC
176 #define CONFIG_BOOTARGS							\
177 	"console=ttyS0,115200 earlyprintk "				\
178 	"root=/dev/mmcblk0p2 rw rootwait"
179 #else
180 #define CONFIG_BOOTARGS							\
181 	"console=ttyS0,115200 earlyprintk "				\
182 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
183 	"256K(env),256k(evn_redundent),256k(spare),"			\
184 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
185 	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
186 #endif
187 
188 #define CONFIG_BAUDRATE			115200
189 
190 #define CONFIG_SYS_PROMPT		"U-Boot> "
191 #define CONFIG_SYS_CBSIZE		256
192 #define CONFIG_SYS_MAXARGS		16
193 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
194 					sizeof(CONFIG_SYS_PROMPT) + 16)
195 #define CONFIG_SYS_LONGHELP
196 #define CONFIG_CMDLINE_EDITING
197 #define CONFIG_AUTO_COMPLETE
198 #define CONFIG_SYS_HUSH_PARSER
199 
200 /* Size of malloc() pool */
201 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
202 
203 #endif
204