1 /*
2  * Configuration settings for the SAMA5D3 Xplained board.
3  *
4  * Copyright (C) 2014 Atmel Corporation
5  *		      Bo Shen <voice.shen@atmel.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 /* No NOR flash, this definition should put before common header */
14 #define CONFIG_SYS_NO_FLASH
15 
16 #include "at91-sama5_common.h"
17 
18 /* serial console */
19 #define CONFIG_ATMEL_USART
20 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
21 #define CONFIG_USART_ID			ATMEL_ID_DBGU
22 
23 /*
24  * This needs to be defined for the OHCI code to work but it is defined as
25  * ATMEL_ID_UHPHS in the CPU specific header files.
26  */
27 #define ATMEL_ID_UHP			ATMEL_ID_UHPHS
28 
29 /*
30  * Specify the clock enable bit in the PMC_SCER register.
31  */
32 #define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
33 
34 /* SDRAM */
35 #define CONFIG_NR_DRAM_BANKS		1
36 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
37 #define CONFIG_SYS_SDRAM_SIZE		0x10000000
38 
39 #ifdef CONFIG_SPL_BUILD
40 #define CONFIG_SYS_INIT_SP_ADDR		0x310000
41 #else
42 #define CONFIG_SYS_INIT_SP_ADDR \
43 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
44 #endif
45 
46 /* NAND flash */
47 #define CONFIG_CMD_NAND
48 
49 #ifdef CONFIG_CMD_NAND
50 #define CONFIG_NAND_ATMEL
51 #define CONFIG_SYS_MAX_NAND_DEVICE	1
52 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
53 /* our ALE is AD21 */
54 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
55 /* our CLE is AD22 */
56 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
57 #define CONFIG_SYS_NAND_ONFI_DETECTION
58 /* PMECC & PMERRLOC */
59 #define CONFIG_ATMEL_NAND_HWECC
60 #define CONFIG_ATMEL_NAND_HW_PMECC
61 #define CONFIG_PMECC_CAP		4
62 #define CONFIG_PMECC_SECTOR_SIZE	512
63 #define CONFIG_CMD_NAND_TRIMFFS
64 #define CONFIG_CMD_MTDPARTS
65 
66 #define CONFIG_MTD_DEVICE
67 #define CONFIG_MTD_PARTITIONS
68 #define CONFIG_RBTREE
69 #define CONFIG_LZO
70 #define CONFIG_CMD_UBIFS
71 #endif
72 
73 /* Ethernet Hardware */
74 #define CONFIG_MACB
75 #define CONFIG_RMII
76 #define CONFIG_NET_RETRY_COUNT		20
77 #define CONFIG_MACB_SEARCH_PHY
78 #define CONFIG_RGMII
79 #define CONFIG_PHYLIB
80 
81 /* MMC */
82 
83 #ifdef CONFIG_CMD_MMC
84 #define CONFIG_GENERIC_MMC
85 #define CONFIG_GENERIC_ATMEL_MCI
86 #define CONFIG_ATMEL_MCI_8BIT
87 #endif
88 
89 /* USB */
90 
91 #ifdef CONFIG_CMD_USB
92 #define CONFIG_USB_ATMEL
93 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
94 #define CONFIG_USB_OHCI_NEW
95 #define CONFIG_SYS_USB_OHCI_CPU_INIT
96 #define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
97 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"SAMA5D3 Xplained"
98 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
99 #endif
100 
101 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
102 #define CONFIG_FAT_WRITE
103 #endif
104 
105 #define CONFIG_SYS_LOAD_ADDR			0x22000000 /* load address */
106 
107 #if CONFIG_SYS_USE_NANDFLASH
108 /* override the bootcmd, bootargs and other configuration for nandflash env */
109 #elif CONFIG_SYS_USE_MMC
110 /* override the bootcmd, bootargs and other configuration for sd/mmc env */
111 #else
112 #define CONFIG_ENV_IS_NOWHERE
113 #endif
114 
115 /* SPL */
116 #define CONFIG_SPL_FRAMEWORK
117 #define CONFIG_SPL_TEXT_BASE		0x300000
118 #define CONFIG_SPL_MAX_SIZE		0x10000
119 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
120 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
121 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
122 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
123 
124 #define CONFIG_SPL_BOARD_INIT
125 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
126 
127 #ifdef CONFIG_SYS_USE_MMC
128 #define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/armv7/u-boot-spl.lds
129 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
130 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
131 
132 #elif CONFIG_SYS_USE_NANDFLASH
133 #define CONFIG_SPL_NAND_DRIVERS
134 #define CONFIG_SPL_NAND_BASE
135 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
136 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
137 #define CONFIG_SYS_NAND_PAGE_SIZE	0x800
138 #define CONFIG_SYS_NAND_PAGE_COUNT	64
139 #define CONFIG_SYS_NAND_OOBSIZE		64
140 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
141 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
142 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
143 
144 #endif
145 
146 #endif
147