xref: /openbmc/u-boot/include/configs/salvator-x.h (revision 1d2c0506)
1 /*
2  * include/configs/salvator-x.h
3  *     This file is Salvator-X board configuration.
4  *
5  * Copyright (C) 2015 Renesas Electronics Corporation
6  *
7  * SPDX-License-Identifier: GPL-2.0+
8  */
9 
10 #ifndef __SALVATOR_X_H
11 #define __SALVATOR_X_H
12 
13 #undef DEBUG
14 
15 #define CONFIG_RCAR_BOARD_STRING "Salvator-X"
16 
17 #include "rcar-gen3-common.h"
18 
19 /* SCIF */
20 #define CONFIG_SCIF_CONSOLE
21 #define CONFIG_CONS_SCIF2
22 #define CONFIG_CONS_INDEX	2
23 #define CONFIG_SH_SCIF_CLK_FREQ	CONFIG_SYS_CLK_FREQ
24 
25 /* [A] Hyper Flash */
26 /* use to RPC(SPI Multi I/O Bus Controller) */
27 #define CONFIG_SYS_NO_FLASH
28 #define CONFIG_ENV_IS_NOWHERE
29 
30 /* Board Clock */
31 /* XTAL_CLK : 33.33MHz */
32 #define RCAR_XTAL_CLK		33333333u
33 #define CONFIG_SYS_CLK_FREQ	RCAR_XTAL_CLK
34 /* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
35 /* CPclk 16.66MHz, S3D2 133.33MHz                          */
36 #define CONFIG_CP_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
37 #define CONFIG_PLL1_CLK_FREQ	(CONFIG_SYS_CLK_FREQ * 192 / 2)
38 #define CONFIG_S3D2_CLK_FREQ	(266666666u/2)
39 
40 /* Generic Timer Definitions (use in assembler source) */
41 #define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
42 
43 /* Generic Interrupt Controller Definitions */
44 #define CONFIG_GICV2
45 #define GICD_BASE	0xF1010000
46 #define GICC_BASE	0xF1020000
47 
48 /* Module stop status bits */
49 /* MFIS, SCIF1 */
50 #define CONFIG_SMSTP2_ENA	0x00002040
51 /* INTC-AP, IRQC */
52 #define CONFIG_SMSTP4_ENA	0x00000180
53 
54 #endif /* __SALVATOR_X_H */
55