xref: /openbmc/u-boot/include/configs/salvator-x.h (revision 014a953c)
1 /*
2  * include/configs/salvator-x.h
3  *     This file is Salvator-X board configuration.
4  *
5  * Copyright (C) 2015 Renesas Electronics Corporation
6  *
7  * SPDX-License-Identifier: GPL-2.0+
8  */
9 
10 #ifndef __SALVATOR_X_H
11 #define __SALVATOR_X_H
12 
13 #undef DEBUG
14 
15 #define CONFIG_RCAR_BOARD_STRING "Salvator-X"
16 
17 #include "rcar-gen3-common.h"
18 
19 /* SCIF */
20 #define CONFIG_CONS_SCIF2
21 #define CONFIG_CONS_INDEX	2
22 #define CONFIG_SH_SCIF_CLK_FREQ        CONFIG_S3D4_CLK_FREQ
23 
24 /* [A] Hyper Flash */
25 /* use to RPC(SPI Multi I/O Bus Controller) */
26 
27 /* Ethernet RAVB */
28 #define CONFIG_BITBANGMII
29 #define CONFIG_BITBANGMII_MULTI
30 
31 /* Board Clock */
32 /* XTAL_CLK : 33.33MHz */
33 #define RCAR_XTAL_CLK		33333333u
34 #define CONFIG_SYS_CLK_FREQ	RCAR_XTAL_CLK
35 /* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
36 /* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz          */
37 #define CONFIG_CP_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
38 #define CONFIG_PLL1_CLK_FREQ	(CONFIG_SYS_CLK_FREQ * 192 / 2)
39 #define CONFIG_S3D2_CLK_FREQ	(266666666u/2)
40 #define CONFIG_S3D4_CLK_FREQ	(266666666u/4)
41 
42 /* Generic Timer Definitions (use in assembler source) */
43 #define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
44 
45 /* Generic Interrupt Controller Definitions */
46 #define CONFIG_GICV2
47 #define GICD_BASE	0xF1010000
48 #define GICC_BASE	0xF1020000
49 
50 /* i2c */
51 #define CONFIG_SYS_I2C
52 #define CONFIG_SYS_I2C_SH
53 #define CONFIG_SYS_I2C_SLAVE		0x60
54 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	1
55 #define CONFIG_SYS_I2C_SH_SPEED0	400000
56 #define CONFIG_SH_I2C_DATA_HIGH		4
57 #define CONFIG_SH_I2C_DATA_LOW		5
58 #define CONFIG_SH_I2C_CLOCK		10000000
59 
60 #define CONFIG_SYS_I2C_POWERIC_ADDR	0x30
61 
62 /* USB */
63 #ifdef CONFIG_R8A7795
64 #define CONFIG_USB_MAX_CONTROLLER_COUNT	3
65 #else
66 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
67 #endif
68 
69 /* SDHI */
70 #define CONFIG_SH_SDHI_FREQ		200000000
71 
72 /* Environment in eMMC, at the end of 2nd "boot sector" */
73 #define CONFIG_ENV_OFFSET		(-CONFIG_ENV_SIZE)
74 #define CONFIG_SYS_MMC_ENV_DEV		1
75 #define CONFIG_SYS_MMC_ENV_PART		2
76 
77 /* Module stop status bits */
78 /* MFIS, SCIF1 */
79 #define CONFIG_SMSTP2_ENA	0x00002040
80 /* SCIF2 */
81 #define CONFIG_SMSTP3_ENA	0x00000400
82 /* INTC-AP, IRQC */
83 #define CONFIG_SMSTP4_ENA	0x00000180
84 
85 #endif /* __SALVATOR_X_H */
86