1 /* 2 * Copyright (C) 2010 Samsung Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * 5 * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_UNIVERSAL_H 11 #define __CONFIG_UNIVERSAL_H 12 13 #include <configs/exynos4-common.h> 14 15 #define CONFIG_TIZEN /* TIZEN lib */ 16 17 /* Keep L2 Cache Disabled */ 18 #define CONFIG_SYS_L2CACHE_OFF 1 19 20 /* Universal has 2 banks of DRAM */ 21 #define CONFIG_NR_DRAM_BANKS 2 22 #define CONFIG_SYS_SDRAM_BASE 0x40000000 23 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 24 25 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ 26 27 /* select serial console configuration */ 28 #define CONFIG_SERIAL2 29 #define CONFIG_BAUDRATE 115200 30 31 /* Console configuration */ 32 33 #define CONFIG_BOOTARGS "Please use defined boot" 34 #define CONFIG_BOOTCOMMAND "run mmcboot" 35 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" 36 37 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 38 - GENERATED_GBL_DATA_SIZE) 39 40 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 41 42 #define CONFIG_SYS_MONITOR_BASE 0x00000000 43 44 /* memtest works on */ 45 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 46 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 47 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 48 49 #define CONFIG_SYS_TEXT_BASE 0x44800000 50 51 #define CONFIG_MTD_DEVICE 52 #define CONFIG_MTD_PARTITIONS 53 54 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ 55 #define MTDIDS_DEFAULT "onenand0=samsung-onenand" 56 57 #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\ 58 "128k(s-boot)"\ 59 ",896k(bootloader)"\ 60 ",256k(params)"\ 61 ",2816k(config)"\ 62 ",8m(csa)"\ 63 ",7m(kernel)"\ 64 ",1m(log)"\ 65 ",12m(modem)"\ 66 ",60m(qboot)"\ 67 ",-(UBI)\0" 68 69 #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT 70 71 #define MBRPARTS_DEFAULT "20M(permanent)"\ 72 ",20M(boot)"\ 73 ",1G(system)"\ 74 ",100M(swap)"\ 75 ",-(UMS)\0" 76 77 #define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7" 78 #define CONFIG_BOOTBLOCK "10" 79 #define CONFIG_UBIBLOCK "9" 80 81 #define CONFIG_ENV_IS_IN_MMC 82 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV 83 #define CONFIG_ENV_SIZE 4096 84 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 85 86 #define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc " 87 #define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \ 88 "${mtdparts}" 89 90 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 91 92 #define CONFIG_ENV_VARS_UBOOT_CONFIG 93 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 94 95 #define CONFIG_EXTRA_ENV_SETTINGS \ 96 "updateb=" \ 97 "onenand erase 0x0 0x100000;" \ 98 "onenand write 0x42008000 0x0 0x100000\0" \ 99 "updatek=" \ 100 "onenand erase 0xc00000 0x500000;" \ 101 "onenand write 0x41008000 0xc00000 0x500000\0" \ 102 "bootk=" \ 103 "run loaduimage; bootm 0x40007FC0\0" \ 104 "updatebackup=" \ 105 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ 106 "mmc dev 0 0\0" \ 107 "updatebootb=" \ 108 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 109 "lpj=lpj=3981312\0" \ 110 "ubifsboot=" \ 111 "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \ 112 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ 113 CONFIG_ENV_COMMON_BOOT "; run bootk\0" \ 114 "tftpboot=" \ 115 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ 116 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ 117 CONFIG_ENV_COMMON_BOOT \ 118 "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \ 119 "nfsboot=" \ 120 "set bootargs root=/dev/nfs rw " \ 121 "nfsroot=${nfsroot},nolock,tcp " \ 122 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 123 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 124 "; run bootk\0" \ 125 "ramfsboot=" \ 126 "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 127 "${console} ${meminfo} " \ 128 "initrd=0x43000000,8M ramdisk=8192\0" \ 129 "mmcboot=" \ 130 "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 131 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 132 "run loaduimage; bootm 0x40007FC0\0" \ 133 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ 134 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 135 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 136 "verify=n\0" \ 137 "rootfstype=ext4\0" \ 138 "console=" CONFIG_DEFAULT_CONSOLE \ 139 "mtdparts=" MTDPARTS_DEFAULT \ 140 "mbrparts=" MBRPARTS_DEFAULT \ 141 "meminfo=crashkernel=32M@0x50000000\0" \ 142 "nfsroot=/nfsroot/arm\0" \ 143 "bootblock=" CONFIG_BOOTBLOCK "\0" \ 144 "ubiblock=" CONFIG_UBIBLOCK" \0" \ 145 "ubi=enabled\0" \ 146 "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 147 "mmcdev=0\0" \ 148 "mmcbootpart=2\0" \ 149 "mmcrootpart=3\0" \ 150 "opts=always_resume=1" 151 152 #define CONFIG_USE_ONENAND_BOARD_INIT 153 #define CONFIG_SAMSUNG_ONENAND 154 #define CONFIG_SYS_ONENAND_BASE 0x0C000000 155 156 #include <asm/arch/gpio.h> 157 /* 158 * I2C Settings 159 */ 160 #define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_B7 161 #define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_B6 162 163 #define CONFIG_SYS_I2C 164 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 165 #define CONFIG_SYS_I2C_SOFT_SPEED 50000 166 #define CONFIG_SYS_I2C_SOFT_SLAVE 0 167 #define CONFIG_SOFT_I2C_READ_REPEATED_START 168 #define CONFIG_I2C_MULTI_BUS 169 #define CONFIG_SYS_MAX_I2C_BUS 7 170 171 #define CONFIG_POWER 172 #define CONFIG_POWER_I2C 173 #define CONFIG_POWER_MAX8998 174 175 #define CONFIG_USB_GADGET_DWC2_OTG_PHY 176 177 /* 178 * SPI Settings 179 */ 180 #define CONFIG_SOFT_SPI 181 182 #ifndef __ASSEMBLY__ 183 void universal_spi_scl(int bit); 184 void universal_spi_sda(int bit); 185 int universal_spi_read(void); 186 #endif 187 188 /* Common misc for Samsung */ 189 #define CONFIG_MISC_COMMON 190 191 #define CONFIG_MISC_INIT_R 192 193 /* Download menu - Samsung common */ 194 #define CONFIG_LCD_MENU 195 #define CONFIG_LCD_MENU_BOARD 196 197 /* Download menu - definitions for check keys */ 198 #ifndef __ASSEMBLY__ 199 #include <power/max8998_pmic.h> 200 201 #define KEY_PWR_PMIC_NAME "MAX8998_PMIC" 202 #define KEY_PWR_STATUS_REG MAX8998_REG_STATUS1 203 #define KEY_PWR_STATUS_MASK (1 << 7) 204 #define KEY_PWR_INTERRUPT_REG MAX8998_REG_IRQ1 205 #define KEY_PWR_INTERRUPT_MASK (1 << 7) 206 207 #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 208 #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 209 #endif /* __ASSEMBLY__ */ 210 211 /* LCD console */ 212 #define LCD_BPP LCD_COLOR16 213 #define CONFIG_SYS_WHITE_ON_BLACK 214 215 /* 216 * LCD Settings 217 */ 218 #define CONFIG_BMP_16BPP 219 #define CONFIG_LD9040 220 #define CONFIG_VIDEO_BMP_GZIP 221 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) 222 223 #endif /* __CONFIG_H */ 224