1 /* 2 * Copyright (C) 2010 Samsung Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * 5 * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board. 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef __CONFIG_H 27 #define __CONFIG_H 28 29 /* 30 * High Level Configuration Options 31 * (easy to change) 32 */ 33 #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ 34 #define CONFIG_S5P 1 /* which is in a S5P Family */ 35 #define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */ 36 #define CONFIG_UNIVERSAL 1 /* working with Universal */ 37 38 #include <asm/arch/cpu.h> /* get chip and board defs */ 39 40 #define CONFIG_ARCH_CPU_INIT 41 #define CONFIG_DISPLAY_CPUINFO 42 #define CONFIG_DISPLAY_BOARDINFO 43 44 /* Keep L2 Cache Disabled */ 45 #define CONFIG_SYS_L2CACHE_OFF 1 46 47 #define CONFIG_SYS_SDRAM_BASE 0x40000000 48 #define CONFIG_SYS_TEXT_BASE 0x44800000 49 50 /* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */ 51 #define CONFIG_SYS_CLK_FREQ_C210 24000000 52 53 #define CONFIG_SETUP_MEMORY_TAGS 54 #define CONFIG_CMDLINE_TAG 55 #define CONFIG_INITRD_TAG 56 #define CONFIG_REVISION_TAG 57 #define CONFIG_CMDLINE_EDITING 58 59 /* Size of malloc() pool */ 60 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) 61 62 /* select serial console configuration */ 63 #define CONFIG_SERIAL_MULTI 1 64 #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ 65 #define CONFIG_BAUDRATE 115200 66 67 /* MMC */ 68 #define CONFIG_GENERIC_MMC 1 69 #define CONFIG_MMC 1 70 #define CONFIG_S5P_MMC 1 71 72 /* PWM */ 73 #define CONFIG_PWM 1 74 75 /* It should define before config_cmd_default.h */ 76 #define CONFIG_SYS_NO_FLASH 1 77 78 /* Command definition */ 79 #include <config_cmd_default.h> 80 81 #undef CONFIG_CMD_FPGA 82 #undef CONFIG_CMD_MISC 83 #undef CONFIG_CMD_NET 84 #undef CONFIG_CMD_NFS 85 #undef CONFIG_CMD_XIMG 86 #define CONFIG_CMD_CACHE 87 #define CONFIG_CMD_ONENAND 88 #define CONFIG_CMD_MTDPARTS 89 #define CONFIG_CMD_MMC 90 #define CONFIG_CMD_FAT 91 92 #define CONFIG_BOOTDELAY 1 93 #define CONFIG_ZERO_BOOTDELAY_CHECK 94 95 #define CONFIG_MTD_DEVICE 96 #define CONFIG_MTD_PARTITIONS 97 98 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ 99 #define MTDIDS_DEFAULT "onenand0=samsung-onenand" 100 101 #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\ 102 "128k(s-boot)"\ 103 ",896k(bootloader)"\ 104 ",256k(params)"\ 105 ",2816k(config)"\ 106 ",8m(csa)"\ 107 ",7m(kernel)"\ 108 ",1m(log)"\ 109 ",12m(modem)"\ 110 ",60m(qboot)"\ 111 ",-(UBI)\0" 112 113 #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT 114 115 #define MBRPARTS_DEFAULT "20M(permanent)"\ 116 ",20M(boot)"\ 117 ",1G(system)"\ 118 ",100M(swap)"\ 119 ",-(UMS)\0" 120 121 #define CONFIG_BOOTARGS "Please use defined boot" 122 #define CONFIG_BOOTCOMMAND "run mmcboot" 123 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 124 125 #define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7" 126 #define CONFIG_BOOTBLOCK "10" 127 #define CONFIG_UBIBLOCK "9" 128 129 #define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc " 130 #define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \ 131 "${mtdparts}" 132 133 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 134 135 #define CONFIG_ENV_OVERWRITE 136 #define CONFIG_SYS_CONSOLE_INFO_QUIET 137 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 138 139 #define CONFIG_EXTRA_ENV_SETTINGS \ 140 "updateb=" \ 141 "onenand erase 0x0 0x100000;" \ 142 "onenand write 0x42008000 0x0 0x100000\0" \ 143 "updatek=" \ 144 "onenand erase 0xc00000 0x500000;" \ 145 "onenand write 0x41008000 0xc00000 0x500000\0" \ 146 "bootk=" \ 147 "run loaduimage; bootm 0x40007FC0\0" \ 148 "updatemmc=" \ 149 "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ 150 "mmc boot 0 1 1 0\0" \ 151 "updatebackup=" \ 152 "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ 153 "mmc boot 0 1 1 0\0" \ 154 "updatebootb=" \ 155 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 156 "lpj=lpj=3981312\0" \ 157 "ubifsboot=" \ 158 "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \ 159 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ 160 CONFIG_ENV_COMMON_BOOT "; run bootk\0" \ 161 "tftpboot=" \ 162 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ 163 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ 164 CONFIG_ENV_COMMON_BOOT \ 165 "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \ 166 "nfsboot=" \ 167 "set bootargs root=/dev/nfs rw " \ 168 "nfsroot=${nfsroot},nolock,tcp " \ 169 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 170 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 171 "; run bootk\0" \ 172 "ramfsboot=" \ 173 "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 174 "${console} ${meminfo} " \ 175 "initrd=0x43000000,8M ramdisk=8192\0" \ 176 "mmcboot=" \ 177 "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 178 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 179 "run loaduimage; bootm 0x40007FC0\0" \ 180 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ 181 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 182 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 183 "verify=n\0" \ 184 "rootfstype=ext4\0" \ 185 "console=" CONFIG_DEFAULT_CONSOLE \ 186 "mtdparts=" MTDPARTS_DEFAULT \ 187 "mbrparts=" MBRPARTS_DEFAULT \ 188 "meminfo=crashkernel=32M@0x50000000\0" \ 189 "nfsroot=/nfsroot/arm\0" \ 190 "bootblock=" CONFIG_BOOTBLOCK "\0" \ 191 "ubiblock=" CONFIG_UBIBLOCK" \0" \ 192 "ubi=enabled\0" \ 193 "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 194 "mmcdev=0\0" \ 195 "mmcbootpart=2\0" \ 196 "mmcrootpart=3\0" \ 197 "opts=always_resume=1" 198 199 /* Miscellaneous configurable options */ 200 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 201 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 202 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 203 #define CONFIG_SYS_PROMPT "Universal # " 204 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 205 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 206 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 207 /* Boot Argument Buffer Size */ 208 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 209 /* memtest works on */ 210 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 211 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 212 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 213 214 #define CONFIG_SYS_HZ 1000 215 216 /* valid baudrates */ 217 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 218 219 /* Stack sizes */ 220 #define CONFIG_STACKSIZE (256 << 10) /* regular stack 256KB */ 221 222 /* Universal has 2 banks of DRAM */ 223 #define CONFIG_NR_DRAM_BANKS 2 224 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ 225 #define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */ 226 #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ 227 #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */ 228 229 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 230 231 #define CONFIG_SYS_MONITOR_BASE 0x00000000 232 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 233 234 #define CONFIG_USE_ONENAND_BOARD_INIT 235 #define CONFIG_SYS_ONENAND_BASE 0x0C000000 236 237 #define CONFIG_ENV_IS_IN_MMC 1 238 #define CONFIG_SYS_MMC_ENV_DEV 0 239 #define CONFIG_ENV_SIZE 4096 240 #define CONFIG_ENV_OFFSET ((32 - 4) << 10)/* 32KiB - 4KiB */ 241 242 #define CONFIG_DOS_PARTITION 1 243 244 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) 245 246 #define CONFIG_SYS_CACHELINE_SIZE 32 247 248 #include <asm/arch/gpio.h> 249 /* 250 * I2C Settings 251 */ 252 #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7) 253 #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6) 254 255 #define CONFIG_SOFT_I2C 256 #define CONFIG_SOFT_I2C_READ_REPEATED_START 257 #define CONFIG_SYS_I2C_SPEED 50000 258 #define CONFIG_I2C_MULTI_BUS 259 #define CONFIG_SYS_MAX_I2C_BUS 7 260 261 #define CONFIG_PMIC 262 #define CONFIG_PMIC_I2C 263 #define CONFIG_PMIC_MAX8998 264 265 #define CONFIG_USB_GADGET 266 #define CONFIG_USB_GADGET_S3C_UDC_OTG 267 #define CONFIG_USB_GADGET_DUALSPEED 268 269 #endif /* __CONFIG_H */ 270